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spectre +aps simulation: the vsources devices with dc=0 are removed, so the currents through those devices cannot be plot

marcelpreda

Hi there,

I have next situation: in some schematics are some vsource(s) used just as nets separators or to probe the currents. In most of the cases type=dc.

They are preferred by designers versus iprobe, because vsources symbols are smaller and do not overlap neighbor wires.

The problem is that when we use spectre +aps, the currents through vsources without voltage ( or dc=0) are not saved.

The iprobes are fine, but as I said the vsources are preferred by some people.

I assume that +aps is doing some netlist optimization, removing the dummy devices. I've already read https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/37112/not-to-remove-instances-whose-terminals-are-connected-together .

I have some questions:

- are the vsources with dc=0 considered as dummy devices?

- is there any possibility to preserve all instances of a specific type? From the above thread I've understood that we can preserve all insts, or selected insts.

- where I can read about the optimizations done by aps and what are the side effects? I assume that speed is coming with a price.

Simulator version: mmsim/15.1.0.isr17

Below is a screenshot of the schematic and the associated netlist. I can probe the currents through bot iprobes and through V3, but not through V1 and V2.

If I remove +aps argument from spectre command line, then I can probe the currents through all vsources too. 

Thank you,

Marcel

 

IPRB2 (net020 net021) iprobe
IPRB1 (net024 net023) iprobe
V3 (net021 net019) vsource dc=100.0m type=dc
V2 (net023 net020) vsource dc=0 type=dc
V1 (net017 net024) vsource type=dc

  • Marc Heise

    Hi Marcel

    https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1Od0000000nWzOEAU

    It's an Andrew solution, with some more details you should read

    "

    If however you have existing voltage sources, you can preserve these by using the preserve_master option. You can add this by going to Simulation->Options->Analog , go to the Miscellaneous tab, and then at the bottom in the Additional arguments field type

     preserve_master=[vsource]

    "

    Kind regards,

    Marc

  • marcelpreda
    in reply to Marc Heise

    Hi Marc,

    It is perfect.  more than perfect.

    Best Regards,

    Marcel

  • Marc Heise
    in reply to marcelpreda

    Well, the credit goes to Andrew for writing the solution. ;)

    Please remember to mention the performance impact to your designers.

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