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How to fix *WARNING* The number of errors was detected in Extract Tab: 1 in Calibre QRC run.

Marben

Hi All,

I am trying to run Calibre Quantus QRC,

First I make a QRC command file name "tech.def".

Here is my code:
DEFINE pex_tech /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_FuncCmax_Detailed

process_technology
-technology_library_file /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_Nominal_Copied_Detailed/tech.def
-technology_name pex_tech
-ruleset_name /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_Nominal_Copied_Detailed/lvsfile

But I have an error in CIW like this:

*WARNING* The number of errors was detected in Extract Tab: 1

I also got an error in CIW like this.

Please help me.

Best regards,

Marben

  • Hi Marben

    If you are doing cap extraction, you need to specify a ground net in "Extraction" tab. You can choose the largest available ground net in the layout, e.g. VSS, AVSS, DVSS, GND, AGND, etc. Alternatively, you can specify universal ground "0" too.


    Best regards
    Quek

  • in reply to Quek

    Hi Queck,

    Thank you very much for replying.

    I specified "vn" as a ground net in "Extraction" tab and "0" in ref node.

    I now got different errors, just like these:

    Cadence Quantus QRC Extraction - 64-bit Parasitic Extractor - Version
    15.1.4-s005 Fri Nov 20 15:19:16 PST 2015
    -------------------------------------------------------------------------------------------------------------------
    Copyright 2015 Cadence Design Systems,
    Inc.

    WARNING (LBRCXM-624): Warning [input]: Line 6: 'well' statement is ignored in ICT file line.

    WARNING (LBRCXM-624): Warning [input]: Line 7: 'well' statement is ignored in ICT file line.

    WARNING (LBRCXU-240): Syntax error in assura_tech map file /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_Nominal_Copied_Detailed/tech.def, line 4:
    process_technology

    WARNING (LBRCXU-240): Syntax error in assura_tech map file /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_Nominal_Copied_Detailed/tech.def, line 5:
    -technology_library_file

    WARNING (LBRCXU-240): Syntax error in assura_tech map file /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_Nominal_Copied_Detailed/tech.def, line 6:
    -technology_name

    Please help.

    Best regards,

    Marben

  • in reply to Marben

    Hi Marben

    1. "vn" is not specified as a ground net. You are using "Full chip selected nets" mode. This means that only R extraction will be done for net vn. C extraction will be done for all nets

    Would you please try the following?

    In "Setup" tab, please enable "Setup Dir" and specify the following path:
    /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_FuncCmax_Detailed

    If the above suggestion does not resolve the error, would you please attach the Quantus log file?

    By the way, you might want to consider using "Coupled" cap mode instead of "Decoupled". The extracted coupling caps will be able to give cross-talk effect during simulation.


    Best regards
    Quek

  • in reply to Quek

    Hi Quek,

    I used the "Coupled" cap mode, I have less errors now.

    Please see attached file.

    Fullscreen qrc.r1.log Download 
    
  Cadence Quantus QRC Extraction - 64-bit Parasitic Extractor - Version
15.1.4-s005 Fri Nov 20 15:19:16 PST 2015
-------------------------------------------------------------------------------------------------------------------
                                    Copyright 2015 Cadence Design Systems,
Inc.

WARNING (LBRCXM-624): Warning [input]: Line 6: 'well' statement is ignored in ICT file line.

WARNING (LBRCXM-624): Warning [input]: Line 7: 'well' statement is ignored in ICT file line.

INFO (LBRCXM-630): Starting extraction: Sun Mar 10 04:33:06 2019


ERROR (AGDPRP-31003): can't open /home/marben/Documents/r1_pin_xy.spi

INFO (RCXSPIC-27150): The following forked command failed. Contact Cadence Customer Support for assistance.
 agdsPrep -V -rundir /home/marben/Documents -outdir /home/marben/Documents/r1 -sch -e /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_Nominal_Copied_Detailed/layerSetupFile:r1.alm,r1.ilf -pl r1.ports -mcell /home/marben/Documents/r1/r1.hcl -l /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_FuncCmax_Detailed/lvsfile -i r1.ixf,r1.lph,r1.sph:r1.gdx -n r1.nxf,r1.stl:r1.gnx -s r1_pin_xy.spi:r1.xcn,hccidtmfile

Forking: agdsPrep -V -rundir /home/marben/Documents -outdir /home/marben/Documents/r1 -sch -e /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_Nominal_Copied_Detailed/layerSetupFile:r1.alm,r1.ilf -pl r1.ports -mcell /home/marben/Documents/r1/r1.hcl -l /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_FuncCmax_Detailed/lvsfile -i r1.ixf,r1.lph,r1.sph:r1.gdx -n r1.nxf,r1.stl:r1.gnx -s r1_pin_xy.spi:r1.xcn,hccidtmfile
ERROR (LBRCXM-633): Bad return status from RCX script generator. Status 256

INFO (LBRCXM-709): *****  Quantus QRC terminated abnormally  *****

    Please help.

    Best regards,

    Marben

  • in reply to Marben

    Hi Marben

    Just to clarify that using coupled or decoupled mode is not really related to our problem. I think previously you had not specified Quantus tech package correctly. After correcting the path, the real error appears:


    ERROR (AGDPRP-31003): can't open /home/marben/Documents/r1_pin_xy.spi

    INFO (RCXSPIC-27150): The following forked command failed. Contact Cadence Customer Support for assistance.
     agdsPrep -V -rundir /home/marben/Documents -outdir /home/marben/Documents/r1 -sch -e /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_Nominal_Copied_Detailed/layerSetupFile:r1.alm,r1.ilf -pl r1.ports -mcell /home/marben/Documents/r1/r1.hcl -l /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_FuncCmax_Detailed/lvsfile -i r1.ixf,r1.lph,r1.sph:r1.gdx -n r1.nxf,r1.stl:r1.gnx -s r1_pin_xy.spi:r1.xcn,hccidtmfile

    Forking: agdsPrep -V -rundir /home/marben/Documents -outdir /home/marben/Documents/r1 -sch -e /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_Nominal_Copied_Detailed/layerSetupFile:r1.alm,r1.ilf -pl r1.ports -mcell /home/marben/Documents/r1/r1.hcl -l /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_FuncCmax_Detailed/lvsfile -i r1.ixf,r1.lph,r1.sph:r1.gdx -n r1.nxf,r1.stl:r1.gnx -s r1_pin_xy.spi:r1.xcn,hccidtmfile
    ERROR (LBRCXM-633): Bad return status from RCX script generator. Status 256


    Have you done Calibre query on the LVS database?

    Best regards
    Quek

  • in reply to Quek

    Hi Quek,

    I didn't do Calibre query on LVS database yet.

    How to do Calibre query on LVS database ?

    Best regards,

    Marben

  • in reply to Marben

    Hi Marben

    a. First do Calibre query as follows in a terminal window:

    terminal> calibre -query svdb mytopcell -query_input query_cmd | tee query.log

    - Please replace "svdb" with the actual name of your LVS database directory
    - Please replace "mytopcell" with the actual name of your top cell
    - Copy query_cmd file from $QRC_HOME/share/extraction/examples/query_cmd
    - Create a "query_output" directory before running query

    b. In Quantus form, select "Run Details" and specify the path to "query_output" directory in "Run Directory" field

    c. Run Quantus extraction


    Best regards
    Quek

  • in reply to Quek

    Hi Quek,

    I did a Calibre query, but same error exist.

    Fullscreen 8540.qrc.r1.log Download 
    
  Cadence Quantus QRC Extraction - 64-bit Parasitic Extractor - Version
15.1.4-s005 Fri Nov 20 15:19:16 PST 2015
-------------------------------------------------------------------------------------------------------------------
                                    Copyright 2015 Cadence Design Systems,
Inc.

WARNING (LBRCXM-624): Warning [input]: Line 6: 'well' statement is ignored in ICT file line.

WARNING (LBRCXM-624): Warning [input]: Line 7: 'well' statement is ignored in ICT file line.

INFO (LBRCXM-630): Starting extraction: Sun Mar 10 05:31:52 2019


ERROR (AGDPRP-31003): can't open /home/marben/Documents/r1_pin_xy.spi

INFO (RCXSPIC-27150): The following forked command failed. Contact Cadence Customer Support for assistance.
 agdsPrep -V -rundir /home/marben/Documents -outdir /home/marben/query_output/query_output/r1 -sch -e /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_Nominal_Copied_Detailed/layerSetupFile:r1.alm,r1.ilf -pl r1.ports -mcell /home/marben/query_output/query_output/r1/r1.hcl -l /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_FuncCmax_Detailed/lvsfile -i r1.ixf,r1.lph,r1.sph:r1.gdx -n r1.nxf,r1.stl:r1.gnx -s r1_pin_xy.spi:r1.xcn,hccidtmfile

Forking: agdsPrep -V -rundir /home/marben/Documents -outdir /home/marben/query_output/query_output/r1 -sch -e /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_Nominal_Copied_Detailed/layerSetupFile:r1.alm,r1.ilf -pl r1.ports -mcell /home/marben/query_output/query_output/r1/r1.hcl -l /home/marben/Desktop/Components/Calibre/PARASITIC/CMOS55LPE_5_00_01_00_LB/CMOS55LPE_5_00_01_00_LB_FuncCmax_Detailed/lvsfile -i r1.ixf,r1.lph,r1.sph:r1.gdx -n r1.nxf,r1.stl:r1.gnx -s r1_pin_xy.spi:r1.xcn,hccidtmfile
ERROR (LBRCXM-633): Bad return status from RCX script generator. Status 256

INFO (LBRCXM-709): *****  Quantus QRC terminated abnormally  *****

    Please help.

    Best regards,

    Marben

  • in reply to Marben

    Hi Marben

    Did you check if there were any errors during Calibre query? "query_output" directory should contain files such as design_pin_xy.spi, etc. As there might be other setup errors, I would suggest that you file a case to the local Cadence support so that an AE can assist you with the extraction.


    Best regards
    Quek

  • in reply to Quek

    Hi Quek,

    I can not see any .spi file such as design_pin_xy.spi.

    Also I didn't see any errors during setup.

    I think youre right. I might file a case to the local cadence support.

    Fullscreen query.log Download 
    //  Calibre v2017.1_34.33    Wed Apr 5 14:22:19 PDT 2017
//  Calibre Utility Library   v0-2_8-2016-2    Tue Feb 9 23:45:01 PST 2016
//  Litho Libraries v2017.1_34.33  Wed Apr 5 14:22:19 PDT 2017
//
//        Copyright Mentor Graphics Corporation 1996-2017
//                       All Rights Reserved.
//   THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION
//      WHICH IS THE PROPERTY OF MENTOR GRAPHICS CORPORATION
//        OR ITS LICENSORS AND IS SUBJECT TO LICENSE TERMS.
//
//  Mentor Graphics software executing under x86-64 Linux
//
//  Running on Linux eda 2.6.32-754.9.1.el6.x86_64 #1 SMP Thu Dec 6 08:02:15 UTC 2018 x86_64 glibc 2.12/NPTL 2.12
//  Processor Intel(R) Core(TM) i7-2670QM CPU @ 2.20GHz [062a7]
//  64 bit virtual addressing enabled
//  Running aoi_cal_2017.1_34.33/pkgs/icv/pvt/calibre -query /home/marben/GF55/GF_stuff/Components/cmos10lpe_CDS_oa_dl064_15_20170731/DRC_LVS_Run_Area/svdb pcd_inv_L -query_input query_cmd
//  Process ID: 11542
//
//  Starting time: Sun Mar 10 05:58:24 2019
//
//  Running on 1 CPU 
//

//  Applying licensing policy...
//  mgc_s license acquired (calibreqdb requested).

//  Licensed Products
//  -----------------
//  Other products:
//  - Query Server

--- CALIBRE::HDB QUERY SERVER --- Sun Mar 10 05:58:24 2019
|-------------------------------- READING PHDB --------------------------------|
################################################################################
--------------------------------------------------------------------------------
-    HDB FOR LAYOUT PRIMARY: "pcd_inv_L" WAS RESTORED FROM SVDB: /home/marben/GF55/GF_stuff/Components/cmos10lpe_CDS_oa_dl064_15_20170731/DRC_LVS_Run_Area/svdb
-    CROSS REFERENCE WAS RESTORED FROM SVDB: /home/marben/GF55/GF_stuff/Components/cmos10lpe_CDS_oa_dl064_15_20170731/DRC_LVS_Run_Area/svdb
-    CPU TIME = 1  REAL TIME = 1  LVHEAP = 80/82/82 MALLOC = 55/55/55
--------------------------------------------------------------------------------


--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
-----          CALIBRE::HDB QUERY SERVER - EXECUTIVE MODULE                -----
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------

INITIATING HDB QUERY SERVER:
--------------
   OK: Ready to serve.
ECHO
   OK: Echo is ON
status
Status 1000
Entries:
0 0 14 Mar 10 05:58:25 2019
Client: 0
View cell: pcd_inv_L
Query instance: (null)
Query cell: pcd_inv_L
Response mode: (direct)
Marker size: 0.25
Maximum vertex count: 4096
Filter distance: 0
Filter layers: (all)
Filter devices: (all)
Filter windows: (none)
Filter cull: X=0 Y=0
Magnify results: 1.0 (default value)
Rotate results: 0.0 (default value)
ReflectX results: Disabled
Translate results: Not Active
PHDB: HIERARCHICAL created with Calibre Version v2017.1_34.33    Wed Apr 5 14:22:19 PDT 2017
XDB: HIERARCHICAL created with Calibre Version v2017.1_34.33    Wed Apr 5 14:22:19 PDT 2017
END OF RESPONSE
0 0 0 Mar 10 05:58:25 2019
   OK.

## Note that the output directory and file name prefix are consistent
## for all output files. This is an important consideration for running
## QRC with the Calibre input data.
## The QRC input_db -directory_name command argument equates to the
## query output directory (query_output)
## The QRC input_db -run_name command equates to the file name
## prefix (Design) for all query output files.

## CALIBRE QUERY SERVER Script for HCCI

   gds         netprop     number   5
   OK.
   gds         placeprop   number   6
   OK.
   gds         devprop     number   7
   OK.

## Write out GDS Map

   response    file                       query_output/Design.gds.map
   OK.
   gds	       seed property device original
   OK.
   gds         map
   OK.
   response    direct
   OK.

## Write the AGF File (Annotated GDS File)

#  GDS UNITS 1 0.000000001   # only avaialble since Calibre 2006.3 release
   gds         write                      query_output/Design.agf
   ERROR(130): Incorrect MASK SVDB DIRECTORY options for this function.

## Include trivial pins and empty cells in the layout netlist
## Use only Node Numbers for netlists
## Do not write empty subcircuits for generic devices

   layout      netlist     trivial pins   YES
   OK.
   layout      netlist     empty cells    YES
   OK.
   layout      netlist     names          NONE
   OK.
   layout      netlist     primitive device subckts  NO
   OK.

## Write the Node to Net Name mapping

   layout      nametable   write          query_output/Design.lnn
   ERROR(130): Incorrect MASK SVDB DIRECTORY options for this function.

## Write a Layout Netlist with Hierarchy and $PIN_XY info

   layout      netlist     hierarchy      AGF
   OK.
   layout      netlist     pin locations  YES
   OK.
   layout      netlist     write          query_output/Design_pin_xy.spi
   ERROR(130): Incorrect MASK SVDB DIRECTORY options for this function.

## If LVS was run with LVS PUSH DEVICES SEPARATE PROPERTIES YES
## then uncomment nextline to write the separate  properties file
## Query log file will produce NOK pin location message which can be ignored

## layout separated properties write query_output/Design.props

## Write X feference file
## Write the source and layout placement hierarchy files (sph,lph) 

## Default behavior is "ON" for both xref xname layout and schematic,
## which inserts extra "X" for every hierarchy. This is desired for 
## extracted view (qrc deals with it automatically) and Ultrasim 
## stitching flow. For cell level timing analysis flow where verilog 
## does not have extra "X", users can turn on below two options.
#   xref xname layout ON
#   xref xname source OFF

   source       hierarchy   write         query_output/Design.sph

//  Applying licensing policy...
//  mgc_s license acquired (calibreci requested).

//  Licensed Products
//  -----------------
//  Base products running on 1 core:
//  - Calibre Connectivity Interface
//  Other products:
//  - Query Server
   OK.
   layout       hierarchy   write         query_output/Design.lph
   OK.

## Write Cross Reference Files
   net         xref        write          query_output/Design.nxf BOX
   OK.
   instance    xref        write          query_output/Design.ixf
   OK.

## Write the TOP Level and CELL Level Port Tables
   port        table       write          query_output/Design.ports
   ERROR(130): Incorrect MASK SVDB DIRECTORY options for this function.
   port        table cells write          query_output/Design.ports_cells
   ERROR(130): Incorrect MASK SVDB DIRECTORY options for this function.

## Generate Device Table for all device info
   response    file 			  query_output/Design.devtab
   OK.
   device      table
   OK.
   response    direct
   OK.

## Report LVS settings
   lvs settings report write                query_output/Design.lvs_settings
   OK.

   terminate
   OK: Terminating.

HDB QUERY SERVER terminated: CPU TIME = 2  REAL TIME = 2  LVHEAP = 1/7/82 MALLOC = 52/52/57

--- CALIBRE::HDB QUERY SERVER COMPLETED - Sun Mar 10 05:58:27 2019
--- TOTAL CPU TIME = 2  REAL TIME = 2  LVHEAP = 1/7/82  MALLOC = 52/52/57  ELAPSED TIME = 3

    Thank you very much for your help again.

    Best regards,

    Marben

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