ERROR [SFE-874]:'Unexpected end of line' while running a .scs file generated using ADE L, cadence Virtuoso v6.1.4 with spectre

By the way, your post went into moderation because it contained lots of repeated text, which is often a sign of spam. As soon as I'd reviewed it (after your feedback) I let it through.

Two things here:

1. You appear to be referencing the cds.lib in the Setup->Model Libraries in ADE. That makes no sense, because the cds.lib does not contain the definitions of the Spectre models, but instead is the definition of the library names used by Virtuoso for schematics, layouts etc. You need instead to reference the transistor models (which define the models for nmos, pmos etc). These probably will be in the PDK setup somewhere and have a .scs suffix, and if you look in the file will contain either "model nmos" or "subckt nmos" lines.
2. You're using very old versions of the tools. Spectre 7.1 is from 10 years ago, and Virtuoso IC614 is probably a similar age (I can't remember off the top of my head, but we've had 4 major IC versions since then, and 10 major versions of Spectre). Why are you using such ancient versions? That's a little bizarre - even for a university. 

Regards,

Andrew

Thank you Andrew. The input.scs files correspoding to models nmos and pmos are not present in the NCSU_TechLib_FreePDK15 folder I downloaded from the site. is there anyway to generate one by myself? The following are the pictures that show the files present in the pmos and nmos directories.

Also about the software version, our institute does not have one. We had to go out of state and are working via VMware, accessing cadence virtuoso.

Thanks in advance.

Ok Andrew Thanks.

You posted earlier today about having found a new version, but that post seems to have vanished (did you delete it?).

Anyway, to answer your question about how to sort out the UNIX path. First of all in the terminal window type:

echo $0

This will tell you the name of the shell you're running - it might be csh, bash, sh or ksh.

If you know the full directory path to the SPECTRE or MMSIM installation, you can do:

If csh:

set path = (/path/to/MMSIM111/tools.lnx86/bin $path)

or if sh/bash/ksh

PATH=/path/to/MMSIM111/tools.lnx86/bin:$PATH

You should then have spectre in your path - try typing "spectre -W" to check the subversion. Having done that, you can then run virtuoso and it would pick up the version of spectre you have.

Regards,

Andrew.

Hello Andrew. I did delete it (sorry for that) but it was because we found a way to install it. After doing so, we again tried the simulation of inverter with NCSU pmos and nmos instances. However, the following happened.

The warnings about ad, as etc are to be expected as the symbol doesn't really match up with the model (you'd have to take that up with the NCSU FreePDK group, if there is a group maintaining it...)

I presume you edited the model file to change the names from nfet/pfet to nmos/pmos - but other than that, did you make any other changes? I'm presuming you did that because the error message is referring to instances of nmos.

Please post your input.scs (it must be different from the one you posted originally, because that has the transistor instance lines not correctly defined). My simple inverter simulated fine with no convergence issues.

Regards,

Andrew

We did not make any changes other than changing nfet/pfet to nmos/pmos. The following is the input.scs

Sending a screenshot of the netlist isn't terribly helpful - I'm not going to type it in again to test it!

That said, it's not dissimilar to what I'd tried before except I used a supply voltage of 1.2V rather than 2V. If I change to 2V I get the blowup you do - I suspect the models are not terribly tolerant of such high voltages (2V would be quite high for a FinFET device).

I think this is a consequence of the models (which are probably very basic). Can you use a lower supply voltage? You should probably take this up with NCSU.

Regards,

Andrew.

ohk sorry. Here is the input.scs

******************************************

// Generated for: spectre
// Generated on: Apr 28 01:14:04 2019
// Design library name: inv_tut
// Design cell name: myInverter
// Design view name: schematic
simulator lang=spectre
global 0 vdd!
include "/root/Desktop/Manusai/Tech_Lib/NCSU-FreePDK15/FreePDK15/hspice/models/fet.inc" section=CMG

// Library name: inv_tut
// Cell name: myInverter
// View name: schematic
M0 (_net0 _net1 0 0) nmos w=100n l=15n as=6.08e-16 ad=6.08e-16 ps=168n \
pd=168n m=2 degradation=no
M1 (_net0 _net1 vdd! vdd!) pmos w=100n l=15n as=6.08e-16 ad=6.08e-16 \
ps=168n pd=168n m=2 degradation=no
V0 (vdd! 0) vsource dc=2 type=dc
V1 (_net1 0) vsource type=pulse val0=0 val1=2 period=20p delay=0 rise=1p \
fall=1p width=9p
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
checklimitdest=psf
tran tran stop=40p write="spectre.ic" writefinal="spectre.fc" \
annotate=status maxiters=5
finalTimeOP info what=oppoint where=rawfile
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts where=rawfile
saveOptions options save=allpub

****************************************************

We tried with smaller voltages of vdc (1.2V and 800mV) but are still getting blowup. can you tell me what did you set your values for vpulse?

I'm guessing that you set the DC supply to 1.2V but left the pulse source at 2V. That's not a good idea... you don't want your pulse source exceeding the supply voltage. Set the high voltage of the pulse to match your DC supply (in ADE probably a good idea to create a design variable and set both sources to use the same variable.

If you have a supply of 1.2V and a pulse peak of 2V, the blowup occurs during the transient when the pulse source goes high.

Blowups are fairly rare in spectre and is usually an indication of poorly characterised models (I suspect they have non-physical behaviour outside a certain voltage range).

Regards,

Andrew.

Thanks Andrew! we finally were able to simulate the inverter circuit. The only thing bothering me is the following (1st picture from my above reply which is third last excluding this one)

********************************************

Notice from spectre during circuit read-in.
"/root/Desktop/Manusai/Tech_Lib/NCSU-FreePDK15/FreePDK15/hspice/models/fet.inc" 41: Version message is not given, map to bsimmg.
"/root/Desktop/Manusai/Tech_Lib/NCSU-FreePDK15/FreePDK15/hspice/models/fet.inc" 70: Version message is not given, map to bsimmg.

********************************************

would simulating the circuit still mean we are working with FinFET or other variants of MGFETs?

It's a typo in the warning message. It should be telling you that it mapped to bsimcmg (not bsimmg) which is the model used for FinFET. I was going to ask R&D to fix it, but I think it's a waste of their time given that this would only occur in old hspice models that don't have the version specified - which is likely to be a rare occurrence these days (except in these academic models).

If you look in the circuit inventory portion of the spectre log, it will say you have bsimcmg devices.

Regards,

Andrew.

It's a typo in the warning message. It should be telling you that it mapped to bsimcmg (not bsimmg) which is the model used for FinFET. I was going to ask R&D to fix it, but I think it's a waste of their time given that this would only occur in old hspice models that don't have the version specified - which is likely to be a rare occurrence these days (except in these academic models).

If you look in the circuit inventory portion of the spectre log, it will say you have bsimcmg devices.

Regards,

Andrew.

Thanks Andrew. One last question...can you tell me where is the spectre log file generally located? I tried searching in some log files just now but in vain...

If running from ADE L (which I assume you are), then using Simulation->Output Log will display it. If  you enlarge the window, you'll see the full path to the file in the banner of the window - which shows you that it's in the psf directory parallel to the netlist directory that contains the input.scs

Regards,

Andrew.

Thank you very much Andrew!!