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Configure VHDL design for simulation using VHDL Tool Box

pyohayo

Hello,

In my simple setup I proceeded as follows:

  1. Created cell block_A (clock stimuli)
  2. Created symbol view for block_A 
  3. In Symbol Editor ... "Create CellView from CellView", then select VHDL... cellview entity was created
  4. In Library Manager created new CellView (tolol VHDL-Editor) and named it vhdl
  5. Put block_A architecture in vhdl cellview
  6. Did pp. 1 ... 5 for block_B (device under test)
  7. Created schematic block_C, where I connected block_A and block_A 
  8. In VHDL Tool Box selected block_C as top hierarchy
  9. Run simulation
  10. In SimVision design browser for block_A it's Ok - I can see internal signals, whereas for only ports are seen  ... and consequently simulation results are not relevant
  11. Then I tried ro create config view for block_C ... but couldn't properly setup it ... what view should I put in "View ro Use" for block_A and block_B ? Only one view is accepted, whereas both entity and architectury are needed.

Thanks in advance.

Pavel.

Parents
  • pyohayo

    Well ... the problem is resolved: there was a syntax error in  block_B    architecture.

    Before closing this topic can someone confirm ... or refute the following contents of config view for block_C:

    Cell                         View Found                           View to Use                    Inherited View List

    block_A                  vhdl                                         empty                               stimulus dataflow vhdl entity schematic symbol

    block_B                 vhdl                                          empty                              stimulus dataflow vhdl entity schematic symbol

    block_C                 schematic                              empty                               stimulus dataflow vhdl entity schematic symbol

    Thanks.

Reply
  • pyohayo

    Well ... the problem is resolved: there was a syntax error in  block_B    architecture.

    Before closing this topic can someone confirm ... or refute the following contents of config view for block_C:

    Cell                         View Found                           View to Use                    Inherited View List

    block_A                  vhdl                                         empty                               stimulus dataflow vhdl entity schematic symbol

    block_B                 vhdl                                          empty                              stimulus dataflow vhdl entity schematic symbol

    block_C                 schematic                              empty                               stimulus dataflow vhdl entity schematic symbol

    Thanks.

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