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FreePDK15 setup/layout problem

Greeny

Hi, dear all,

I am trying to develop a library using FreePDK15 open cell library. But currently I can not create any vias in the layout editor and error pops up as follows when I try to add any vias.

The error is the same for all other constraint groups. 

I found a file called "FreePDK.tf" which contains a section like this. 

Are the sections standardViaDefs and customViaDefs useful? Do I have to define my own vias here? If yes, I am confused by the required inputs like "LibName" "CellName" and "resistancePerCut" so I hope someone can guide me through what should I fill for them. If not, can anyone help me find a way to define vias in the constraint group? Thanks a lot in advance!

Sincerely

Greeny 

Parents

  • Hi Greeny,

    This PDK is pretty primitive and has lots of stuff missing. It seems to have quite a lot of fixed cells for vias in the NCSU_TechLib_FreePDK15 library, but these aren't parameterised. You could add these to the customViaDefs - e.g.

    (MINT3_MINT2 NCSU_TechLib_FreePDK15 MINT3_MINT2 layout MINT2 MINT3 0.0)
    (MINT4_MINT3 NCSU_TechLib_FreePDK15 MINT4_MINT3 layout MINT3 MINT4 0.0)

    but this will be a bit rubbish because they are not parameterised. I'd suggest it would be better to fill in the stdViaDefs based on the relevant rules for those vias (I didn't spend time trying to figure out what is appropriate).

    You'd then want to add a validVias rule into the virtuosoDefaultExtractorSetup constraint group in the tech file so that it knows which vias to use.

    Or you could contact whoever maintains this Free PDK.

    Andrew.

Reply

  • Hi Greeny,

    This PDK is pretty primitive and has lots of stuff missing. It seems to have quite a lot of fixed cells for vias in the NCSU_TechLib_FreePDK15 library, but these aren't parameterised. You could add these to the customViaDefs - e.g.

    (MINT3_MINT2 NCSU_TechLib_FreePDK15 MINT3_MINT2 layout MINT2 MINT3 0.0)
    (MINT4_MINT3 NCSU_TechLib_FreePDK15 MINT4_MINT3 layout MINT3 MINT4 0.0)

    but this will be a bit rubbish because they are not parameterised. I'd suggest it would be better to fill in the stdViaDefs based on the relevant rules for those vias (I didn't spend time trying to figure out what is appropriate).

    You'd then want to add a validVias rule into the virtuosoDefaultExtractorSetup constraint group in the tech file so that it knows which vias to use.

    Or you could contact whoever maintains this Free PDK.

    Andrew.

Children
  • in reply to Andrew Beckett

    Hi, dear Andrew,

    Thanks a lot for your reply.

    I have been checking the discussions on the forum but I am still confused by what you are referring to by the tech file(The cdsDefTechLib?) I have been searching through my directories to find a file which contains the text "virtuosoDefaultExctractorSetup" but failed. I am attaching my cdslib file so that you could specify more on how I can trace the tech file and find it in my library. 

    Thank you !

    Greeny

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