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CMOS inverter PAC output

nicodega
nicodega over 5 years ago

Hi everyone,

I'm simulating a basic CMOS inverter driven by an ideal squarewave at frequency say 1GHz. Inverter output is a squarewave too.
With a PSS I can see its spectrum and it's of course made of odd harmonics (1GHz, 3GHz etc.. + DC tone).Then I put a PAC=1 signal at the inverter input with frequency range say 100k - 0.5G (the Nyquist frequency of the PSS) with 10 sidebands. At the output I was expecting to see the input bandwidth "redistributed" over the output odd harmonics while around the even ones there would be no signal at all, instead I see the opposite: high gain on even harmonics and no gain around odd harmonics.
Am I misinterpreting the behavior of a PAC simulation? What am I missing?

Thank you in advance

N

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  • nicodega
    nicodega over 5 years ago

    Any help on this topic?
    Thank you

    Nicola

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  • Andrew Beckett
    Andrew Beckett over 5 years ago in reply to nicodega

    If this was urgent, you should contact customer support. Personally I didn't respond sooner because I was on vacation last week, and the day job has got in the way this week.

    Anyway, I'm not sure this particularly makes sense to analyse? The PAC analysis is going to give you the small-signal time-averaged output (effectively the gain in this) case, where that's time-averaged over the period. The gain during the points at which the inverter input is high or low is going to be very small, and you're only really getting gain during the transitions. In my case the gain is very low across all harmonics, and does indeed exhibit the behaviour you describe (I've not tried to think why, because my first question is why would you be trying to analyse this?). If I use sampled mode and set the threshold to the mid-point of the output, I get pretty much constant gain at all sidebands (which seems reasonable, because the inverter will behave like an amplifier mid-range - in this case you're sampling the response at the mid-point and so that's ignoring the portions of the inverter period that have no gain).

    So I'm really not sure what you're actually trying to simulate here.

    Andrew.

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  • nicodega
    nicodega over 5 years ago in reply to Andrew Beckett

    Thank you so much Andrew, your answer helped me a lot.

    Originally, I was trying to simulate how inverter noise behaves in frequency.
    Since transistors' noise is turned on and off along with transistors, I'd expect that noise spectrum is convolved with the harmonics of a 0-1 squarewave of 1GHz. Hence, at the output node, low frequency noise (like flicker, that is easy to spot in a spectrum) should be found around dc, around 1GHz, around 3GHz etc... 

    However, a timeaverage pnoise (done in 1M-0.5G, 1.001G-1.5G etc...) will show more flicker noise around 2GHz than around 3GHz. That's because, as you pointed out, it's an average behavior over the pss period and the results can be confusing. I was investigating this behavior with a PAC and that's when I got stuck with my thinking and posted here.
    On the other hand, a sampled pnoise on the transition will show everything folded in the Nyquist bandwidth, and I can't discriminate the original frequency location of noise.

    So I'm not sure how can I check such a behavior with a simulation. Do you have any suggestion?

    Thank you again
    Nicola

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  • ShawnLogan
    ShawnLogan over 5 years ago in reply to nicodega

    Dear nicodega,

     

        nicodega said:

        Originally, I was trying to simulate how inverter noise behaves in frequency.

     

        nicodega said:

        So I'm not sure how can I check such a behavior with a simulation. Do you have any suggestion?

     

    As Andrew correctly noted, the simulation results I believe you are interested in obtaining are strictly a large signal question. Hence, I too believe a PAC analysis is not appropriate. However, I am not sure of the motivation for your interest. Specifically, you can study the sidebands of the noise at various harmonics, but I am not sure that matters for anything but a pedantic perspective. What ultimately matters is now much of the noise at each harmonic is folded back to baseband by the sampling process. Do you agree? Having written this, however, I think you can estimate the various harmonic contributions as follows. I just tried this and have some results to share for your information.

     

    1. I ran a pss/pnoise analysis of a set of CMOS inverters driven by a noiseless source. The resulting phase noise is provided in the attached workbook in tab "Square_wave_input"

     

    1. I also examine the frequency spectrum of the output waveform from its pss_fd result and that is also shown in the second plot on tab "Square_wave_input". Note that, as you correctly surmised, the odd harmonics dominate the spectrum with the 3rd, 5th, etc. of lesser magnitude than the fundamental. This also suggests that the sampled noise spectrum at the 3rd, 5th, etc. will be lower than that at the fundamental. I think this gets at the basic result you were expecting to observed - except you can't actually see the aliased noise spectrums at each harmonic.

     

    1. I then create a copy of the test bench and, using the same inverter, provide a feedback resistor of value 10K to stabilize its DC operating point about its switching threshold. I further modify it to AC couple a sine wave into the now self-biased inverter's gate nodes. I repeat the phase noise analysis using a much lower amplitude input, 50 mVpp, to minimize the harmonics at the inverter's output.
    • The resulting phase noise and spectrum of this 50 mVpp, 1 GHz input at the output of the self-biased inverter are provided in tab "Sine_wave_input". I've kept the y-axes scales the same for an easy comparison of results between the square and sine wave inputs. The amplitudes of the output harmonics are significantly reduced relative to the square wave input. Hence, the noise aliased down to baseband will be much less for the 3rd, 5th, etc. than in the square wave case. The output phase noise of the two are comparable - not identical - but comparable. What this suggests to me is that the dominant noise contribution to the low frequency noise is due to the baseband noise and NOT due to the higher harmonics - which is the result you were trying to ascertain (I think anyway!)

     

    Let me know if this provides any insight to your question...I hope so anyway!

     

    Shawn

    pnoise_results_sml_042320.xlsx
     

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  • nicodega
    nicodega over 5 years ago in reply to ShawnLogan

    Dear Shawn, thank you for your answer and your detailed analysis!

     

    Your noise spectra actually seemed quite different to me, but maybe I got confused because they are dbC/Hz and so the two signal amplitudes are included.
    I then tried to repeat your noise simulations, plotting noise in V/sqrt(Hz) instead. The results are reported in the attached file.
    In the first tab TB the testbench is shown: one inverter is open-loop and driven with a large sinusoid, the other is closed-loop in an AC coupler configuration and driven with a 50mV sinusoid. The only noise contributor activated is flicker noise.

    In the second tab RESULTS, the two PNOISE timeaverage results are shown: PNOISE is shown up to 500MHz, because I’m not sure it makes sense to go beyond half the PSS frequency.

    Low frequency noise of the inverter is lower than the AC coupler case and it makes sense because the noisy elements are averagely on less than the AC coupler case, where the input is small.


    Anyhow, the idea that I wanted to confirm with a simulation is the one that I tried to depict in the picture.

    The inverter here shown is driven with a large square wave. Its noise n1 is continuously turned on and off, hence what I expect is that the its noise generator is multiplied by 0 and 1 repeatedly. This should behave like a mixer, upconverting n1 noise. Output noise spectrum should have low frequency components (here represented as flicker) over the odd harmonics only + DC component. On the other hand, if noise around odd harmonics is present, it will be downconverted.


    However, as Andrew pointed out, probably neither a PNOISE timeaverage nor a PNOISE sampled are the correct simulations to check such a noise spectrum.

     

    testbench.xlsx

      

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  • ShawnLogan
    ShawnLogan over 5 years ago in reply to nicodega

    Dear nicodena,

    Thank you for reviewing my comments and you added effort! You are correct that the two sets of results are not identical - but I would not expect them to be exactly the same. My motivation was just to show that the noise when there is very little harmonic content (representing base band noise with the AC coupled set-biased inverter) was the same order of magnitude of the folded noise with the contributions of the remaining harmonics included...if my explanation makes any sense!

    nicodega said:

    Anyhow, the idea that I wanted to confirm with a simulation is the one that I tried to depict in the picture.

    The inverter here shown is driven with a large square wave. Its noise n1 is continuously turned on and off, hence what I expect is that the its noise generator is multiplied by 0 and 1 repeatedly. This should behave like a mixer, upconverting n1 noise. Output noise spectrum should have low frequency components (here represented as flicker) over the odd harmonics only + DC component.

    If you are interested in just what the spectrum looks like, I would think a transient noise simulation will provide a plot similar to your figure titled "Out noise due to n1". I performed a transient noise simulation using a noise bandwidth of 500 MHz and a 1 GHz square wave feeding an inverter. I used a strobepoint of my maximum integration step (1 ps), and performed a 65.536 ns simulation to allow for a 65536 point dft without interpolation. The attached plot of the DFT of the output shows the noise spectrum folded about each harmonic of the 1 GHz input frequency. Is this close to what you were hoping to show?

    Shawn

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  • nicodega
    nicodega over 5 years ago in reply to ShawnLogan

    Dear Shawn,

    Yes, that’s what I wanted to plot! I should have thought about a transient noise.

    In your simulation however the skirts around the harmonics I believe are due not to flicker noise but to the fact that you’re not taking an integer number of 1GHz-periods inside your 0-65.536ns window. I retried similar simulations and these are the results that I get. The circuit is an inverter driven with the squarewave and the transient noise is performed with Noise Fmax=100M and Noise Fmin=100k. Input frequency is always 1GHz.

    The output waveform transform is calculated with rectangular windowing from 10ns to 100ns (90 periods) with 65.536k bins (yellow).

    The comparison with the same DFT but in a noiseless transient simulation (blue) shows the 100k-100M noise placed around every harmonics.

    Thanks everyone!

    Nicola

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  • ShawnLogan
    ShawnLogan over 5 years ago in reply to nicodega

    Dear nicodega,

    nicodega said:
    n your simulation however the skirts around the harmonics I believe are due not to flicker noise but to the fact that you’re not taking an integer number of 1GHz-periods inside your 0-65.536ns window.

    You are absolutely correct! The dft of the noise sidebands is corrupted by the presence of spectral leakage due to my choice of dft period and input frequency period - I should have realized that of course. IN any case, I corrected the input frequency to be 1/64 of the dft sample time. I also thought you might be interested in the impact of the noise bandwidth on the spectrum. The attached plot shows the impact of setting the noise bandwidth to 200 MHz (for an input tone close to 1 GHz) and 500 MHz. It is evident that the added aliasing in the dft of the 500 MHz band limited noise tends to obscure the skirts of the 200 MHz noise characteristic about the harmonics of the input frequency.

    In any case, thank you for the aded analysis on your part, and I was happy to read that the transient noise provides something close to what you were hoping to view.

    Shawn

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