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How to simulate the same circuit, but with different input combination

Hello everyone,
i am a new cadence virtuoso user and i am not good at using it. With this post, i would like to ask you some help and tips to improve my usage of cadence.

I am currently working on the design of a routing architecture, and i need to test it under different input combinations. My architecture has 32 digital input, and what i would love to do is to feed the system with all the possibile input combination and simulate each one of it.

Every transient simulation must last for about 45ns and i would also like to check if the system is behaving correclty checking the states of 16 digital signals of the system: in particular in a bundle of 4 signals only 1 must be high at time.

i would like to ask you:

-which tool is most appropriate to feed the different combination to the system? i woudn't like to have a linear shift register that make all the possibile input combination, because in this way i will have just one really long simulation. what i would like to have is just 1 simulation per combination, that will automatically close as soon as it ends, and a new one will starts.

-How can i automatize the checking process? As soon as a simulation end, "cadence" should check if the system behaved correctly( eventually telling me if it didn't and for which input combination) and go on with the next one.

Where can i found information to solve my problem? which information shall i look for?

Many thanks!!

Best regards,

Andrea

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FormerMember over 5 years ago
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FormerMember over 5 years ago
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Andrew Beckett over 5 years ago in reply to FormerMember

Another approach for driving digital signals is to use the vector file stimulus on Setup->Simulation Files. Or if you want to sweep a parameter, rather than using a Verilog-A model for an ADC, you could use the bussetp component in this article (one of mine): Creating a component that allows setting a value on a bus in an analog simulation . This has a variable bus-width output (up to a maximum of 31 bits wide), and the value can be a parameter which may be set to a variable and then swept in ADE.

Andrew.
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