Run AMS simulation with ADE-L with import systemVerilogCustom_pkg::*

Hi Support, 

I am running ADE-L simulation with Config view. One block is with SystemVerilog and another one is pure analog circuit with transistors. 

In SystemVerilog, I need to import custom library (for example, systemVerilogCustom_pkg) so top level sv file include import cst_pkg::*; in the first line. 

When a simulation is launched, I see following errors: 

xrun: *W,OPDEPRREN: Command Line Option (-nclibdirpath) is deprecated. Use (-xmlibdirpath) instead.
file: /virtuoso/spice_dump/virtuoso/simulation/tb_digital_core/ams/config/netlist/.mapi//dummyMapi.vams
file: /virtuoso/aaa_christinep_test/digital_core/systemVerilog/verilog.sv
import systemVerilogCustom_pkg::*;
|
xmvlog: *E,NOPBIND (/virtuoso/aaa_christinep_test/digital_core/systemVerilog/verilog.sv,3|13): Package cst_pkg could not be bound.
input cst_additional_config_t cst_additional_config1,
|
xmvlog: *E,SVNOTY /virtuoso/aaa_christinep_test/digital_core/systemVerilog/verilog.sv,17|36): Syntactically this identifier appears to begin a datatype but it does not refer to a visible datatype in the current scope.
input clk_controller_config_t clk_controller_config1,
|

errors: 3, warnings: 0
xmvlog: *W,SPDUSD: Include directory /dump/virtuoso/ given but not used.
xmvlog: *W,NOTOPL: no top-level unit found, must have recursive instances.
Total errors/warnings found outside modules and primitives:

Searched this forum, it looks like compiler order issue, but not sure how I can solve it. 

All cst_additional_config_t is defined in the systemVerilogCustom_pkg. I know these files are okay in terms of SystemVerilog Syntax because when I ran with VCS without Analog Portion, it worked. 

Thanks, 

Christine