Hi! Is it possible to tell ADE-L to include a file without needing to hard-code its path? This procedure works in Assembler, but fails in ADE-L: 1. I put the file to include (say "input.scs") under the cell directory 2. In the ADE-L state I define a variable with the path, to be resolved at netlisting time: spectre_include=strcat(dbFullLibPath(asiGetDesignLibName(asiGetSession(hiGetCurrentWindow()))) "/" asiGetDesignCellName(asiGetSession(hiGetCurrentWindow())) "/input.scs") 3. In the model files window, I add an entry VAR("spectre_include") (Note: I need a variable because when adding the skill code directly here, it tries to interpret it as a model and section definition!)The problem is that ADE-L doesn't resolve the Skill code and netlists this as follows:[...]Vdd=8.500000e-01 \spectre_include=strcat(dbFullLibPath(asiGetDesignLibName(asiGetSession(hiGetCurrentWindow()))) \"/" asiGetDesignCellName(asiGetSession(hiGetCurrentWindow())) "/input.scs") \Vss=0 \[...]include "correct_path_to_my_cell/input.scs"[...]And even tough the model definition is resolved correctly, Spectre complains about the unresolved variable value:Error found by spectre during circuit read-in.ERROR (SFE-874): "input.scs" 41: Cannot run the simulation because syntax error `Unexpected quoted string ""/". Expected close parenthesis or comma' was encountered at line 41, column 4. Correct the syntax error and rerun the simulation.ERROR (SFE-683): "input.scs" 41: Badly formed parameters statement.Is there anyway to force ADE-L to resolve such variable? Or any other way to include a file without hard-coding its path?Thanks and regards,Jorge.
Design variables in ADE L are not SKILL expressions, and Spectre itself doesn't understand SKILL so this is not going to work. If you use ADE Explorer, ADE XL or ADE Assembler I think it would work (you might have to tweak the expression a bit - I didn't try).
However, how about this for a different approach which would also have the benefit of working with design management tools too. Instead of doing it this way, create a new cellView, mylib/includeBlock/spectreText (of view type "spectre"), with contents as follows:
// "spectre" description for "mylib", "includeBlock", "spectreText"
// an empty subckt - we don't particular want anything in the designsubckt includeBlock ()ends includeBlock
// the stuff you wanted to include - here I added a second transient analysis, saytran2 tran stop=2u
When you hit the "extract" icon (or File->Extract) it will prompt you to create a symbol with no pins. You can then instantiate this in your testbench, and it will then get included in the netlist with no need to do anything else...