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  3. Fatal error when use ADE L to simulate veriloga blocks.

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Fatal error when use ADE L to simulate veriloga blocks.

HaolinCong
HaolinCong over 5 years ago

Hi,

I am using 6.1.6 to do some design and I try to use some VerilogA blocks, for example the blocks in ahdlLib and some customized blocks, in my simulation. But it meets an error showing below. The error index number is ' ERROR (VACOMP-1008)'. It seams that cadence cannot compile the ahdlcmi module library. I have no idea what is that.  I highlight the error message with red. Thank you very much if anyone can help me.

Simulating `input.scs' on sahand at 9:56:19 AM, Thur Jul 16, 2020 (process id: 2391).
Current working directory: /home/home2/students/haolinco/simulation/test_veriloga/spectre/schematic/netlist
Command line:
    /opt/cadence/MMSIM141/tools.lnx86/bin/spectre -64 input.scs  \
        +escchars +log ../psf/spectre.out +inter=mpsc  \
        +mpssession=spectre0_53396_1 -format psfxl -raw ../psf  \
        +lqtimeout 900 -maxw 5 -maxn 5
spectre pid = 2391

Loading /opt/cadence/MMSIM141/tools.lnx86/cmi/lib/64bit/5.0/libinfineon_sh.so ...
Loading /opt/cadence/MMSIM141/tools.lnx86/cmi/lib/64bit/5.0/libphilips_o_sh.so ...
Loading /opt/cadence/MMSIM141/tools.lnx86/cmi/lib/64bit/5.0/libphilips_sh.so ...
Loading /opt/cadence/MMSIM141/tools.lnx86/cmi/lib/64bit/5.0/libsparam_sh.so ...
Loading /opt/cadence/MMSIM141/tools.lnx86/cmi/lib/64bit/5.0/libstmodels_sh.so ...
Reading file:  /home/home2/students/haolinco/simulation/test_veriloga/spectre/schematic/netlist/input.scs
Reading file:  /opt/cadence/MMSIM141/tools.lnx86/spectre/etc/configs/spectre.cfg
Reading link:  /opt/cadence/IC616/tools/dfII/samples/artist/ahdlLib/and_gate/veriloga/veriloga.va
Reading link:  /opt/cadence/IC616/tools
Reading file:  /opt/cadence/IC616/tools.lnx86/dfII/samples/artist/spectreHDL/Verilog-A/logic/and_gate.va
Reading link:  /opt/cadence/MMSIM141/tools.lnx86/spectre/etc/ahdl/discipline.h
Reading file:  /opt/cadence/MMSIM141/tools.lnx86/spectre/etc/ahdl/disciplines.vams
Reading link:  /opt/cadence/MMSIM141/tools.lnx86/spectre/etc/ahdl/constants.h
Reading file:  /opt/cadence/MMSIM141/tools.lnx86/spectre/etc/ahdl/constants.vams

Warning from spectre during AHDL read-in.
    WARNING (VACOMP-2265): "$finish;<<--? "
        "/opt/cadence/IC616/tools/dfII/samples/artist/ahdlLib/and_gate/veriloga/veriloga.va", line 49: In Cadence Verilog-A, the $finish function always behaves as though the message level value is 0, regardless of the value you specify: The simulator does not report simulation time, location, or statistics about memory and CPU time usage.

Time for NDB Parsing: CPU = 94.71 ms, elapsed = 614.42 ms.
Time accumulated: CPU = 148.894 ms, elapsed = 614.434 ms.
Peak resident memory used = 66.4 Mbytes.


Warning from spectre during AHDL read-in.
    WARNING (VACOMP-2265): "$finish;<<--? "
        "/opt/cadence/IC616/tools/dfII/samples/artist/ahdlLib/and_gate/veriloga/veriloga.va", line 49: In Cadence Verilog-A, the $finish function always behaves as though the message level value is 0, regardless of the value you specify: The simulator does not report simulation time, location, or statistics about memory and CPU time usage.

Created directory input.ahdlSimDB/ (775)
Created directory input.ahdlSimDB//3712_artist_ahdlLib_and_gate_veriloga_veriloga.va.and_gate.ahdlcmi/ (775)
Created directory input.ahdlSimDB//3712_artist_ahdlLib_and_gate_veriloga_veriloga.va.and_gate.ahdlcmi/Linux-64/ (775)
Compiling ahdlcmi module library.

Warning from spectre during AHDL read-in.
    WARNING (VACOMP-2397): Compilation failed when using pipe build. Bytecode flow will be used for encrypted VerilogA, and normal file compilation will be used for unencrypted VerilogA.

Compiling ahdlcmi module library.

Error found by spectre during AHDL read-in.
    ERROR (VACOMP-1008): Cannot compile ahdlcmi module library. Check the log file input.ahdlSimDB//3712_artist_ahdlLib_and_gate_veriloga_veriloga.va.and_gate.ahdlcmi/Linux-64/../ahdlcmi.out for details. If the compiler ran out of memory, use 'setenv CDS_CMI_COMPLEVEL 0', and try again. Otherwise, contact your Cadence Customer Support representative with the netlist, log files, behavioral model files, and any other information that can help identify the problem.
    ERROR (SFE-91): Error when elaborating the instance and_gate. Simulation should be terminated.

Time for Elaboration: CPU = 64.186 ms, elapsed = 9.7813 s.
Time accumulated: CPU = 213.243 ms, elapsed = 10.3959 s.
Peak resident memory used = 75.2 Mbytes.


Aggregate audit (9:56:30 AM, Thur Jul 16, 2020):
Time used: CPU = 214 ms, elapsed = 10.4 s, util. = 2.05%.
Time spent in licensing: elapsed = 129 ms.
Peak memory used = 75.2 Mbytes.
Simulation started at: 9:56:19 AM, Thur Jul 16, 2020, ended at: 9:56:30 AM, Thur Jul 16, 2020, with elapsed time (wall clock): 10.4 s.
spectre completes with 2 errors, 3 warnings, and 0 notices.
spectre terminated prematurely due to fatal error.

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  • Andrew Beckett
    Andrew Beckett over 5 years ago

    Did you do what the error message suggested and look in the ahdlcmi.out file that it referenced to see if that gives any more information? Perhaps you can post the model and the content of that file here?

    Andrew.

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  • HaolinCong
    HaolinCong over 5 years ago in reply to Andrew Beckett

    Hi Andrew,

    Thank you very much for helping me with this. I tried to read the log file. But due to my knowledge, it is a little bit hard for me to understand. I can only tell some message related to an unexpected data type. Here is the log file as well as the block model (and_gate from ahdlLib) I am using in the simulation. I think the forum stops me to posting long content, so I attached them below. Thank  you very much.

    Fullscreen ahdlcmi.out.txt Download
    ahdlcmicompile: Compiling ahdlcmi in input.ahdlSimDB//3712_artist_ahdlLib_and_gate_veriloga_veriloga.va.and_gate.ahdlcmi/Linux-64/ for Linux-64 with optimize using gcc on Thu Jul 16 10:03:25 PDT 2020 [5.0]
    ahdlcmicompile: Generating makefile
    PATH:  /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.1-x86_64/install/bin:/opt/cadence/MMSIM141/bin:/opt/cadence/MMSIM141/tools.lnx86/bin/64bit:/opt/cadence/MMSIM141/tools.lnx86/bin:/opt/cadence/IC616/bin:/opt/cadence/IC616/tools/bin:/opt/cadence/IC616/tools.lnx86/bin/64bit:/opt/cadence/IC616/tools.lnx86/bin:/opt/cadence/IC616/share/oa/bin:/usr/local/xictools/wrspice/bin:/usr/local/xictools/xic/bin:/home/home2/students/tingruli/cadence/installs/INNOVUS171/bin:/home/home2/students/haolinco/Tools/gmsh_4_2_2/bin:/home/home2/students/haolinco/Tools/inductex/ix_5_07_23_linux/bin:/home/home2/students/naveen/jsim-2.0e:/usr/lib/jvm/java-7-openjdk-amd64/bin:/home/home2/students/tingruli/cadence/installs/INNOVUS171/bin:/opt/cadence/installs/VMANAGER1903/tools.lnx86/bin:/opt/cadence/installs/VMANAGER1903/tools/vmgr/bin:/opt/cadence/installs/VMANAGER1903/tools/vmgr/admin:/opt/cadence/installs/VMANAGER1903/bin:/opt/cadence/installs/XCELIUM1903/bin:/usr/local/texlive/2014/bin/x86_64-linux:/opt/mentor/Sourcery_CodeBench_Lite_for_ARM_GNU_Linux/bin:/opt/mentor/Sourcery_CodeBench_Lite_for_ARM_EABI/bin:/opt/synopsys/hspice/O-2018.09-SP2-2/hspice/bin:/opt/synopsys/lc/O-2018.06-SP5-1/bin:/opt/synopsys/wv/O-2018.09-SP2/bin:/opt/synopsys/syn/P-2019.03-SP1-1/bin:/opt/synopsys/I-2013.12_SP1/ai_bin:/opt/synopsys/L-2016.06-SP1/bin:/opt/synopsys/lc/M-2016.12-SP3-1/bin:/opt/synopsys/syn/L-2016.03-SP5-8/bin:/opt/matlab/R2017a/bin:/usr/local/bin:/usr/bin:/bin:/usr/local/games:/usr/games:/usr/lib/jvm/java-8-oracle/bin:/usr/lib/jvm/java-8-oracle/db/bin:/usr/lib/jvm/java-8-oracle/jre/bin:/opt/eclipse:/opt/synopsys/L-2016.06/bin:/opt/synopsys/hspice/M-2017.03-SP2-1/hspice/bin:/opt/synopsys/G-2012.06-SP1/bin:/opt/synopsys/H_2013.03/bin:/opt/synopsys/L-2016.06-1/bin:/opt/netbeans-8.0.1/bin:/opt/gurobi/linux64/bin:/usr/local/cuda/bin:/opt/mentor/questa_sim/bin:/opt/mentor/modeltech/linux_x86_64:/opt/cadence/INCISIV141/tools/bin:/opt/cadence/INCISIV141/vmanager/bin:/opt/cadence/INCISIV141/tools/vmgr/admin
    LD_LIBRARY_PATH:  /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.1-x86_64/install/lib:/opt/cadence/MMSIM141/tools.lnx86/giganta/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/mdl/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/mmsim/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/inca/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/spectre/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/dfII/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/lib:/opt/cadence/IC616/tools/lib:/opt/cadence/IC616/share/oa/lib/linux_rhel50_gcc44x_64/opt:/opt/cadence/IC616/tools.lnx86/Qt/64bit/lib:/opt/cadence/IC616/tools.lnx86/dfII/lib/64bit:/opt/cadence/IC616/tools.lnx86/sev/lib/64bit:/opt/cadence/IC616/tools.lnx86/lib/64bit:/opt/cadence/IC616/tools.lnx86/lib:/opt/cadence/INCISIV141/tools.lnx86/lib/64bit:/opt/gurobi/linux64/lib:/usr/local/cuda/lib64:/usr/local/lib:/usr/local/culasparse/lib64:/usr/local/cula/lib64:/usr/lib/x86_64-linux-gnu:/usr/lib/:/home/home2/students/tingruli/cadence/installs/INNOVUS171/oa_v22.50.063/lib/linux_rhel50_gcc48x_64/opt:/home/home2/students/tingruli/cadence/installs/INNOVUS171/tools.lnx86/lib:/opt/gurobi/linux64/lib:/usr/local/cuda/lib64:/usr/local/lib:/usr/local/culasparse/lib64:/usr/local/cula/lib64:/usr/lib/x86_64-linux-gnu:/usr/lib/:/home/home2/students/tingruli/cadence/installs/INNOVUS171/oa_v22.50.063/lib/linux_rhel50_gcc48x_64/opt:/home/home2/students/tingruli/cadence/installs/INNOVUS171/tools.lnx86/lib
    /opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/bin/gnumake -j33 -f GNUmakefile
    Cleaning ./obj/optimize/5.0
    rm -f -rf ./obj/optimize/5.0
    Compiling C file and_gate_func.c (optimize) with -O0
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc  -march=k8 -ffast-math -O0 -m64 -DSYSV -DSVR4 -D_REENTRANT -fPIC   -DconfigSPECTRE -I. -I/opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include -c and_gate_func.c -o obj/optimize/5.0/and_gate_func.o || rm -f -f obj/optimize/5.0/and_gate_func.o
    Compiling C file and_gate_DcFuncDerLoad.c (optimize)
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc  -march=k8 -ffast-math -O0 -m64 -DSYSV -DSVR4 -D_REENTRANT -fPIC   -DconfigSPECTRE -I. -I/opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include -c and_gate_DcFuncDerLoad.c -o obj/optimize/5.0/and_gate_DcFuncDerLoad.o || rm -f -f obj/optimize/5.0/and_gate_DcFuncDerLoad.o
    Compiling C file and_gate_DcFuncLoad.c (optimize)
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc  -march=k8 -ffast-math -O0 -m64 -DSYSV -DSVR4 -D_REENTRANT -fPIC   -DconfigSPECTRE -I. -I/opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include -c and_gate_DcFuncLoad.c -o obj/optimize/5.0/and_gate_DcFuncLoad.o || rm -f -f obj/optimize/5.0/and_gate_DcFuncLoad.o
    Compiling C file and_gate_TranFuncDerLoad.c (optimize)
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc  -march=k8 -ffast-math -O0 -m64 -DSYSV -DSVR4 -D_REENTRANT -fPIC   -DconfigSPECTRE -I. -I/opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include -c and_gate_TranFuncDerLoad.c -o obj/optimize/5.0/and_gate_TranFuncDerLoad.o || rm -f -f obj/optimize/5.0/and_gate_TranFuncDerLoad.o
    Compiling C file and_gate_TranFuncLoad.c (optimize)
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc  -march=k8 -ffast-math -O0 -m64 -DSYSV -DSVR4 -D_REENTRANT -fPIC   -DconfigSPECTRE -I. -I/opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include -c and_gate_TranFuncLoad.c -o obj/optimize/5.0/and_gate_TranFuncLoad.o || rm -f -f obj/optimize/5.0/and_gate_TranFuncLoad.o
    Compiling C file and_gate_cmi_c.c (optimize) with -O0
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc  -march=k8 -ffast-math -O0 -m64 -DSYSV -DSVR4 -D_REENTRANT -fPIC   -DconfigSPECTRE -I. -I/opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include -I/opt/cadence/MMSIM141/tools.lnx86/cmi/include -c and_gate_cmi_c.c -o obj/optimize/5.0/and_gate_cmi_c.o || rm -f -f obj/optimize/5.0/and_gate_cmi_c.o
    and_gate_func.c: In function 'and_gate_ParamInit':
    and_gate_func.c:247: warning: floating constant exceeds range of 'double'
    and_gate_func.c:248: warning: floating constant exceeds range of 'double'
    and_gate_func.c:267: warning: floating constant exceeds range of 'double'
    and_gate_func.c:268: warning: floating constant exceeds range of 'double'
    and_gate_func.c:287: warning: floating constant exceeds range of 'double'
    and_gate_func.c:288: warning: floating constant exceeds range of 'double'
    and_gate_func.c:307: warning: floating constant exceeds range of 'double'
    and_gate_func.c:308: warning: floating constant exceeds range of 'double'
    and_gate_cmi_c.c: In function 'and_gate_pDC_Load':
    and_gate_cmi_c.c:599: warning: passing argument 1 of 'aslDevFillZeorDiagonalElemet' makes pointer from integer without a cast
    /opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include/ahdlDevLibGlobal.h:1933: note: expected 'void *' but argument is of type 'long int'
    and_gate_cmi_c.c: In function 'and_gate_pCompare':
    and_gate_cmi_c.c:651: warning: assignment makes integer from pointer without a cast
    and_gate_cmi_c.c:651: warning: passing argument 1 of 'memcpy' makes pointer from integer without a cast
    /usr/include/string.h:42: note: expected 'void * __restrict__' but argument is of type 'long int'
    and_gate_cmi_c.c:651: warning: passing argument 2 of 'memcpy' makes pointer from integer without a cast
    /usr/include/string.h:42: note: expected 'const void * __restrict__' but argument is of type 'long int'
    and_gate_cmi_c.c:651: warning: assignment makes integer from pointer without a cast
    and_gate_cmi_c.c: In function 'and_gate_pGetMatrixPointers':
    and_gate_cmi_c.c:657: warning: assignment makes integer from pointer without a cast
    rm -f -rf and_gate_DcFuncLoad.c
    rm -f -rf and_gate_DcFuncDerLoad.c
    and_gate_cmi_c.c: In function 'and_gate_pAnalTranLoad':
    and_gate_cmi_c.c:699: warning: passing argument 1 of 'aslDevFillZeorDiagonalElemet' makes pointer from integer without a cast
    /opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include/ahdlDevLibGlobal.h:1933: note: expected 'void *' but argument is of type 'long int'
    rm -f -rf and_gate_TranFuncLoad.c
    rm -f -rf and_gate_TranFuncDerLoad.c
    and_gate_cmi_c.c: In function 'and_gate_pSaveRestart':
    and_gate_cmi_c.c:725: warning: passing argument 2 of 'aslDevAvarSR' from incompatible pointer type
    /opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include/ahdlDevLibGlobal.h:1162: note: expected 'struct ahdlAnalogVar *' but argument is of type 'char *'
    and_gate_cmi_c.c: In function 'and_gate_pSaveRestartInst':
    and_gate_cmi_c.c:728: warning: passing argument 2 of 'aslDevAvarSR' from incompatible pointer type
    /opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include/ahdlDevLibGlobal.h:1162: note: expected 'struct ahdlAnalogVar *' but argument is of type 'char *'
    rm -f -rf and_gate_func.c
    rm -f -rf and_gate_cmi_c.c
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc -shared -O0 -m64 -fPIC -o obj/optimize/5.0/and_gate_libahdlcmi.so ./obj/optimize/5.0/and_gate_func.o ./obj/optimize/5.0/and_gate_DcFuncDerLoad.o ./obj/optimize/5.0/and_gate_DcFuncLoad.o ./obj/optimize/5.0/and_gate_TranFuncDerLoad.o ./obj/optimize/5.0/and_gate_TranFuncLoad.o ./obj/optimize/5.0/and_gate_cmi_c.o  -Wl,-rpath,/usr/lib -Wl,-rpath,/lib -s 
    ld: cannot find -lc
    collect2: ld returned 1 exit status
    gnumake: *** [obj/optimize/5.0/and_gate_libahdlcmi.so] Error 1
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc -shared -O0 -m64 -fPIC -o obj/optimize/5.0/and_gate_libahdlcmi.so ./obj/optimize/5.0/and_gate_func.o ./obj/optimize/5.0/and_gate_DcFuncDerLoad.o ./obj/optimize/5.0/and_gate_DcFuncLoad.o ./obj/optimize/5.0/and_gate_TranFuncDerLoad.o ./obj/optimize/5.0/and_gate_TranFuncLoad.o ./obj/optimize/5.0/and_gate_cmi_c.o  -Wl,-rpath,/usr/lib -Wl,-rpath,/lib -s 
    ld: cannot find -lc
    collect2: ld returned 1 exit status
    gnumake: *** [obj/optimize/5.0/and_gate_libahdlcmi.so] Error 1
    

    Fullscreen veriloga.txt Download
    `include "discipline.h"
    `include "constants.h"
    
    // $Date: 1998/09/23 03:13:33 $
    // $Revision: 1.2 $
    //
    //
    // Based on the OVI Verilog-A Language Reference Manual, version 1.0 1996
    //
    //
    
    
    
    //--------------------
    // and
    //
    // -  and gate
    //
    // vin1, vin2:	[V,A]
    // vout:	[V,A]
    //
    // INSTANCE parameters
    //    vlogic_high = output voltage for high [V]
    //    vlogic_low  = output voltage for high [V]
    //    vtrans      = voltages above this at input are considered high [V]
    //    tdel, trise, tfall = {usual} [s]
    //
    
    module and_gate(vin1, vin2, vout);
    input vin1, vin2;
    output vout;
    electrical vin1, vin2, vout;
    parameter real vlogic_high = 5;
    parameter real vlogic_low = 0;
    parameter real vtrans = 1.4;
    parameter real tdel = 2u from [0:inf);
    parameter real trise = 1u from (0:inf);
    parameter real tfall = 1u from (0:inf);
    
       real vout_val;
       integer logic1, logic2;
    
    
       analog begin
    
          @ ( initial_step ) begin
    	 if (vlogic_high < vlogic_low) begin
    	    $display("Range specification error.  vlogic_high = (%E) less than vlogic_low = (%E).\n", vlogic_high, vlogic_low );
    	    $finish;
    	 end
    	 if (vtrans > vlogic_high || vtrans < vlogic_low) begin
    	    $display("Inconsistent $threshold specification w/logic family.\n");
    	 end
          end
    
          logic1 = V(vin1) > vtrans;
          logic2 = V(vin2) > vtrans;
    
          @ (cross(V(vin1) - vtrans, 1))  logic1 = 1;
          @ (cross(V(vin1) - vtrans, -1)) logic1 = 0;
    
          @ (cross(V(vin2) - vtrans, 1))  logic2 = 1;
          @ (cross(V(vin2) - vtrans, -1)) logic2 = 0;
    
          //
          // define the logic function.
          //
          vout_val = (logic1 && logic2) ? vlogic_high : vlogic_low;
    
          V(vout) <+ transition( vout_val, tdel, trise, tfall);
       end
    endmodule
    

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  • HaolinCong
    HaolinCong over 5 years ago in reply to Andrew Beckett

    Hi Andrew,

    Thank you very much for helping me with this. I tried to read the log file. But due to my knowledge, it is a little bit hard for me to understand. I can only tell some message related to an unexpected data type. Here is the log file as well as the block model (and_gate from ahdlLib) I am using in the simulation. I think the forum stops me to posting long content, so I attached them below. Thank  you very much.

    Fullscreen ahdlcmi.out.txt Download
    ahdlcmicompile: Compiling ahdlcmi in input.ahdlSimDB//3712_artist_ahdlLib_and_gate_veriloga_veriloga.va.and_gate.ahdlcmi/Linux-64/ for Linux-64 with optimize using gcc on Thu Jul 16 10:03:25 PDT 2020 [5.0]
    ahdlcmicompile: Generating makefile
    PATH:  /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.1-x86_64/install/bin:/opt/cadence/MMSIM141/bin:/opt/cadence/MMSIM141/tools.lnx86/bin/64bit:/opt/cadence/MMSIM141/tools.lnx86/bin:/opt/cadence/IC616/bin:/opt/cadence/IC616/tools/bin:/opt/cadence/IC616/tools.lnx86/bin/64bit:/opt/cadence/IC616/tools.lnx86/bin:/opt/cadence/IC616/share/oa/bin:/usr/local/xictools/wrspice/bin:/usr/local/xictools/xic/bin:/home/home2/students/tingruli/cadence/installs/INNOVUS171/bin:/home/home2/students/haolinco/Tools/gmsh_4_2_2/bin:/home/home2/students/haolinco/Tools/inductex/ix_5_07_23_linux/bin:/home/home2/students/naveen/jsim-2.0e:/usr/lib/jvm/java-7-openjdk-amd64/bin:/home/home2/students/tingruli/cadence/installs/INNOVUS171/bin:/opt/cadence/installs/VMANAGER1903/tools.lnx86/bin:/opt/cadence/installs/VMANAGER1903/tools/vmgr/bin:/opt/cadence/installs/VMANAGER1903/tools/vmgr/admin:/opt/cadence/installs/VMANAGER1903/bin:/opt/cadence/installs/XCELIUM1903/bin:/usr/local/texlive/2014/bin/x86_64-linux:/opt/mentor/Sourcery_CodeBench_Lite_for_ARM_GNU_Linux/bin:/opt/mentor/Sourcery_CodeBench_Lite_for_ARM_EABI/bin:/opt/synopsys/hspice/O-2018.09-SP2-2/hspice/bin:/opt/synopsys/lc/O-2018.06-SP5-1/bin:/opt/synopsys/wv/O-2018.09-SP2/bin:/opt/synopsys/syn/P-2019.03-SP1-1/bin:/opt/synopsys/I-2013.12_SP1/ai_bin:/opt/synopsys/L-2016.06-SP1/bin:/opt/synopsys/lc/M-2016.12-SP3-1/bin:/opt/synopsys/syn/L-2016.03-SP5-8/bin:/opt/matlab/R2017a/bin:/usr/local/bin:/usr/bin:/bin:/usr/local/games:/usr/games:/usr/lib/jvm/java-8-oracle/bin:/usr/lib/jvm/java-8-oracle/db/bin:/usr/lib/jvm/java-8-oracle/jre/bin:/opt/eclipse:/opt/synopsys/L-2016.06/bin:/opt/synopsys/hspice/M-2017.03-SP2-1/hspice/bin:/opt/synopsys/G-2012.06-SP1/bin:/opt/synopsys/H_2013.03/bin:/opt/synopsys/L-2016.06-1/bin:/opt/netbeans-8.0.1/bin:/opt/gurobi/linux64/bin:/usr/local/cuda/bin:/opt/mentor/questa_sim/bin:/opt/mentor/modeltech/linux_x86_64:/opt/cadence/INCISIV141/tools/bin:/opt/cadence/INCISIV141/vmanager/bin:/opt/cadence/INCISIV141/tools/vmgr/admin
    LD_LIBRARY_PATH:  /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.1-x86_64/install/lib:/opt/cadence/MMSIM141/tools.lnx86/giganta/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/mdl/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/mmsim/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/inca/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/spectre/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/dfII/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/lib/64bit:/opt/cadence/MMSIM141/tools.lnx86/lib:/opt/cadence/IC616/tools/lib:/opt/cadence/IC616/share/oa/lib/linux_rhel50_gcc44x_64/opt:/opt/cadence/IC616/tools.lnx86/Qt/64bit/lib:/opt/cadence/IC616/tools.lnx86/dfII/lib/64bit:/opt/cadence/IC616/tools.lnx86/sev/lib/64bit:/opt/cadence/IC616/tools.lnx86/lib/64bit:/opt/cadence/IC616/tools.lnx86/lib:/opt/cadence/INCISIV141/tools.lnx86/lib/64bit:/opt/gurobi/linux64/lib:/usr/local/cuda/lib64:/usr/local/lib:/usr/local/culasparse/lib64:/usr/local/cula/lib64:/usr/lib/x86_64-linux-gnu:/usr/lib/:/home/home2/students/tingruli/cadence/installs/INNOVUS171/oa_v22.50.063/lib/linux_rhel50_gcc48x_64/opt:/home/home2/students/tingruli/cadence/installs/INNOVUS171/tools.lnx86/lib:/opt/gurobi/linux64/lib:/usr/local/cuda/lib64:/usr/local/lib:/usr/local/culasparse/lib64:/usr/local/cula/lib64:/usr/lib/x86_64-linux-gnu:/usr/lib/:/home/home2/students/tingruli/cadence/installs/INNOVUS171/oa_v22.50.063/lib/linux_rhel50_gcc48x_64/opt:/home/home2/students/tingruli/cadence/installs/INNOVUS171/tools.lnx86/lib
    /opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/bin/gnumake -j33 -f GNUmakefile
    Cleaning ./obj/optimize/5.0
    rm -f -rf ./obj/optimize/5.0
    Compiling C file and_gate_func.c (optimize) with -O0
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc  -march=k8 -ffast-math -O0 -m64 -DSYSV -DSVR4 -D_REENTRANT -fPIC   -DconfigSPECTRE -I. -I/opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include -c and_gate_func.c -o obj/optimize/5.0/and_gate_func.o || rm -f -f obj/optimize/5.0/and_gate_func.o
    Compiling C file and_gate_DcFuncDerLoad.c (optimize)
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc  -march=k8 -ffast-math -O0 -m64 -DSYSV -DSVR4 -D_REENTRANT -fPIC   -DconfigSPECTRE -I. -I/opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include -c and_gate_DcFuncDerLoad.c -o obj/optimize/5.0/and_gate_DcFuncDerLoad.o || rm -f -f obj/optimize/5.0/and_gate_DcFuncDerLoad.o
    Compiling C file and_gate_DcFuncLoad.c (optimize)
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc  -march=k8 -ffast-math -O0 -m64 -DSYSV -DSVR4 -D_REENTRANT -fPIC   -DconfigSPECTRE -I. -I/opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include -c and_gate_DcFuncLoad.c -o obj/optimize/5.0/and_gate_DcFuncLoad.o || rm -f -f obj/optimize/5.0/and_gate_DcFuncLoad.o
    Compiling C file and_gate_TranFuncDerLoad.c (optimize)
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc  -march=k8 -ffast-math -O0 -m64 -DSYSV -DSVR4 -D_REENTRANT -fPIC   -DconfigSPECTRE -I. -I/opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include -c and_gate_TranFuncDerLoad.c -o obj/optimize/5.0/and_gate_TranFuncDerLoad.o || rm -f -f obj/optimize/5.0/and_gate_TranFuncDerLoad.o
    Compiling C file and_gate_TranFuncLoad.c (optimize)
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc  -march=k8 -ffast-math -O0 -m64 -DSYSV -DSVR4 -D_REENTRANT -fPIC   -DconfigSPECTRE -I. -I/opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include -c and_gate_TranFuncLoad.c -o obj/optimize/5.0/and_gate_TranFuncLoad.o || rm -f -f obj/optimize/5.0/and_gate_TranFuncLoad.o
    Compiling C file and_gate_cmi_c.c (optimize) with -O0
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc  -march=k8 -ffast-math -O0 -m64 -DSYSV -DSVR4 -D_REENTRANT -fPIC   -DconfigSPECTRE -I. -I/opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include -I/opt/cadence/MMSIM141/tools.lnx86/cmi/include -c and_gate_cmi_c.c -o obj/optimize/5.0/and_gate_cmi_c.o || rm -f -f obj/optimize/5.0/and_gate_cmi_c.o
    and_gate_func.c: In function 'and_gate_ParamInit':
    and_gate_func.c:247: warning: floating constant exceeds range of 'double'
    and_gate_func.c:248: warning: floating constant exceeds range of 'double'
    and_gate_func.c:267: warning: floating constant exceeds range of 'double'
    and_gate_func.c:268: warning: floating constant exceeds range of 'double'
    and_gate_func.c:287: warning: floating constant exceeds range of 'double'
    and_gate_func.c:288: warning: floating constant exceeds range of 'double'
    and_gate_func.c:307: warning: floating constant exceeds range of 'double'
    and_gate_func.c:308: warning: floating constant exceeds range of 'double'
    and_gate_cmi_c.c: In function 'and_gate_pDC_Load':
    and_gate_cmi_c.c:599: warning: passing argument 1 of 'aslDevFillZeorDiagonalElemet' makes pointer from integer without a cast
    /opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include/ahdlDevLibGlobal.h:1933: note: expected 'void *' but argument is of type 'long int'
    and_gate_cmi_c.c: In function 'and_gate_pCompare':
    and_gate_cmi_c.c:651: warning: assignment makes integer from pointer without a cast
    and_gate_cmi_c.c:651: warning: passing argument 1 of 'memcpy' makes pointer from integer without a cast
    /usr/include/string.h:42: note: expected 'void * __restrict__' but argument is of type 'long int'
    and_gate_cmi_c.c:651: warning: passing argument 2 of 'memcpy' makes pointer from integer without a cast
    /usr/include/string.h:42: note: expected 'const void * __restrict__' but argument is of type 'long int'
    and_gate_cmi_c.c:651: warning: assignment makes integer from pointer without a cast
    and_gate_cmi_c.c: In function 'and_gate_pGetMatrixPointers':
    and_gate_cmi_c.c:657: warning: assignment makes integer from pointer without a cast
    rm -f -rf and_gate_DcFuncLoad.c
    rm -f -rf and_gate_DcFuncDerLoad.c
    and_gate_cmi_c.c: In function 'and_gate_pAnalTranLoad':
    and_gate_cmi_c.c:699: warning: passing argument 1 of 'aslDevFillZeorDiagonalElemet' makes pointer from integer without a cast
    /opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include/ahdlDevLibGlobal.h:1933: note: expected 'void *' but argument is of type 'long int'
    rm -f -rf and_gate_TranFuncLoad.c
    rm -f -rf and_gate_TranFuncDerLoad.c
    and_gate_cmi_c.c: In function 'and_gate_pSaveRestart':
    and_gate_cmi_c.c:725: warning: passing argument 2 of 'aslDevAvarSR' from incompatible pointer type
    /opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include/ahdlDevLibGlobal.h:1162: note: expected 'struct ahdlAnalogVar *' but argument is of type 'char *'
    and_gate_cmi_c.c: In function 'and_gate_pSaveRestartInst':
    and_gate_cmi_c.c:728: warning: passing argument 2 of 'aslDevAvarSR' from incompatible pointer type
    /opt/cadence/MMSIM141/tools.lnx86/spectre/ahdlcmi/include/ahdlDevLibGlobal.h:1162: note: expected 'struct ahdlAnalogVar *' but argument is of type 'char *'
    rm -f -rf and_gate_func.c
    rm -f -rf and_gate_cmi_c.c
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc -shared -O0 -m64 -fPIC -o obj/optimize/5.0/and_gate_libahdlcmi.so ./obj/optimize/5.0/and_gate_func.o ./obj/optimize/5.0/and_gate_DcFuncDerLoad.o ./obj/optimize/5.0/and_gate_DcFuncLoad.o ./obj/optimize/5.0/and_gate_TranFuncDerLoad.o ./obj/optimize/5.0/and_gate_TranFuncLoad.o ./obj/optimize/5.0/and_gate_cmi_c.o  -Wl,-rpath,/usr/lib -Wl,-rpath,/lib -s 
    ld: cannot find -lc
    collect2: ld returned 1 exit status
    gnumake: *** [obj/optimize/5.0/and_gate_libahdlcmi.so] Error 1
    /opt/cadence/MMSIM141/tools.lnx86/cdsgcc/gcc/4.4/bin/gcc -shared -O0 -m64 -fPIC -o obj/optimize/5.0/and_gate_libahdlcmi.so ./obj/optimize/5.0/and_gate_func.o ./obj/optimize/5.0/and_gate_DcFuncDerLoad.o ./obj/optimize/5.0/and_gate_DcFuncLoad.o ./obj/optimize/5.0/and_gate_TranFuncDerLoad.o ./obj/optimize/5.0/and_gate_TranFuncLoad.o ./obj/optimize/5.0/and_gate_cmi_c.o  -Wl,-rpath,/usr/lib -Wl,-rpath,/lib -s 
    ld: cannot find -lc
    collect2: ld returned 1 exit status
    gnumake: *** [obj/optimize/5.0/and_gate_libahdlcmi.so] Error 1
    

    Fullscreen veriloga.txt Download
    `include "discipline.h"
    `include "constants.h"
    
    // $Date: 1998/09/23 03:13:33 $
    // $Revision: 1.2 $
    //
    //
    // Based on the OVI Verilog-A Language Reference Manual, version 1.0 1996
    //
    //
    
    
    
    //--------------------
    // and
    //
    // -  and gate
    //
    // vin1, vin2:	[V,A]
    // vout:	[V,A]
    //
    // INSTANCE parameters
    //    vlogic_high = output voltage for high [V]
    //    vlogic_low  = output voltage for high [V]
    //    vtrans      = voltages above this at input are considered high [V]
    //    tdel, trise, tfall = {usual} [s]
    //
    
    module and_gate(vin1, vin2, vout);
    input vin1, vin2;
    output vout;
    electrical vin1, vin2, vout;
    parameter real vlogic_high = 5;
    parameter real vlogic_low = 0;
    parameter real vtrans = 1.4;
    parameter real tdel = 2u from [0:inf);
    parameter real trise = 1u from (0:inf);
    parameter real tfall = 1u from (0:inf);
    
       real vout_val;
       integer logic1, logic2;
    
    
       analog begin
    
          @ ( initial_step ) begin
    	 if (vlogic_high < vlogic_low) begin
    	    $display("Range specification error.  vlogic_high = (%E) less than vlogic_low = (%E).\n", vlogic_high, vlogic_low );
    	    $finish;
    	 end
    	 if (vtrans > vlogic_high || vtrans < vlogic_low) begin
    	    $display("Inconsistent $threshold specification w/logic family.\n");
    	 end
          end
    
          logic1 = V(vin1) > vtrans;
          logic2 = V(vin2) > vtrans;
    
          @ (cross(V(vin1) - vtrans, 1))  logic1 = 1;
          @ (cross(V(vin1) - vtrans, -1)) logic1 = 0;
    
          @ (cross(V(vin2) - vtrans, 1))  logic2 = 1;
          @ (cross(V(vin2) - vtrans, -1)) logic2 = 0;
    
          //
          // define the logic function.
          //
          vout_val = (logic1 && logic2) ? vlogic_high : vlogic_low;
    
          V(vout) <+ transition( vout_val, tdel, trise, tfall);
       end
    endmodule
    

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