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  3. [ Liberate ] Cells do not have -extsim_model parameter specified...

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[ Liberate ] Cells do not have -extsim_model parameter specified in define_leafcell command

iamKarthikBK
iamKarthikBK over 4 years ago

I am trying to characterize a standard cell library, but liberate gives me the following errors.

WARNING (LIB-40): (set_var): Ignored the invalid value '$model' specified for 'extsim_model_include'. It should be set to an absolute file path.
INFO (LIB-511): (define_leafcell): Leafcell 'N_18_MM' (instance) has been identified with pin_position (0 1 2 3) mapped to (D G S B).
LIBERATE parameter "extsim_exclusive" set to "1"
INFO (LIB-511): (define_leafcell): Leafcell 'P_18_MM' (instance) has been identified with pin_position (0 1 2 3) mapped to (D G S B).
LIBERATE parameter "simulator" set to "spectre"
LIBERATE parameter "char_library_skip_var_list" set to ""
Start Characterizing Library at (Wed May 19 00:36:13 IST 2021)

WARNING (LIB-909): (read_spice): Could not find a model/subckt definition for instance 'c' named 'mim_va' with '2' terminals.  Liberate will attempt to guess the device type. Read the models in read_spice or use define_leafcell to map the name to a model/subckt and rerun.
WARNING (LIB-909): (read_spice): Could not find a model/subckt definition for instance 'r1' named 'res_va' with '2' terminals.  Liberate will attempt to guess the device type. Read the models in read_spice or use define_leafcell to map the name to a model/subckt and rerun.
WARNING (LIB-909): (read_spice): Could not find a model/subckt definition for instance 'rs' named 'reshr_va' with '2' terminals.  Liberate will attempt to guess the device type. Read the models in read_spice or use define_leafcell to map the name to a model/subckt and rerun.
WARNING (LIB-909): (read_spice): Could not find a model/subckt definition for instance 'rs' named 'resnp_va' with '2' terminals.  Liberate will attempt to guess the device type. Read the models in read_spice or use define_leafcell to map the name to a model/subckt and rerun.
WARNING (LIB-909): (read_spice): Could not find a model/subckt definition for instance 'rs' named 'respp_va' with '2' terminals.  Liberate will attempt to guess the device type. Read the models in read_spice or use define_leafcell to map the name to a model/subckt and rerun.
WARNING (LIB-933): To enable automatic leaf-cell recognition, the variable 'extsim_model_include' is required.
INFO (LIB-956): (read_spice): Reading file: 'dut.scs'.
INFO (LIB-955): (read_spice): Further occurrences of the preceding message will be suppressed.
INFO (LIB-940): The parser has identified the following leaf cells. Review these for missing or incorrect settings and if needed, add them to your Tcl script and rerun.
INFO (LIB-906): (AUTO): define_leafcell -type black_box -pin_position {0 1 2} l_slcr20k_rf
INFO (LIB-906): (AUTO): define_leafcell -type c -pin_position {0 1 2} mimcapm_rf
INFO (LIB-906): (AUTO): define_leafcell -type c -pin_position {0 1} mimcaps_mm
INFO (LIB-906): (AUTO): define_leafcell -type nmos -pin_position {0 1 2 3} n_l18w500_18_rf
INFO (LIB-906): (AUTO): define_leafcell -type nmos -pin_position {0 1 2 3} n_l34w500_33_rf
INFO (LIB-906): (AUTO): define_leafcell -type nmos -pin_position {0 1 2 3} n_po7w500_18_rf
INFO (LIB-906): (AUTO): define_leafcell -type nmos -pin_position {0 1 2 3} n_po7w500_33_rf
INFO (LIB-906): (AUTO): define_leafcell -type pmos -pin_position {0 1 2 3} p_l18w500_18_rf
INFO (LIB-906): (AUTO): define_leafcell -type pmos -pin_position {0 1 2 3} p_l34w500_33_rf
INFO (LIB-906): (AUTO): define_leafcell -type pmos -pin_position {0 1 2 3} p_po7w500_18_rf
INFO (LIB-906): (AUTO): define_leafcell -type pmos -pin_position {0 1 2 3} p_po7w500_33_rf
INFO (LIB-906): (AUTO): define_leafcell -type diode -pin_position {0 1} vardiop_rf
INFO (LIB-906): (AUTO): define_leafcell -type black_box -pin_position {0 1 2} varmis_18_rf
INFO (LIB-907): (AUTO): define_leafcell -element -type c -pin_position {0 1} mim_va
INFO (LIB-943): Finished reading netlist(s) at May 19 00:36:13.
INFO (LIB-711): Feature 'Virtuoso_Multi_mode_Simulation' exists in the license pool. The parameter 'spectre_use_mmsim_token_license' will be set to '1'.
INFO (LIB-1008): (char_library): This LIBERATE release was qualified with MMSIM version '' but newer version '19.1.0.396.isr8' was detected. If MMSIM-related issues are found, update to the qualified MMSIM version and re-run.
INFO (LIB-966): Using Spectre version 19.1.0.396.isr8 located at: /home/installs/SPECTRE191/tools/bin/spectre.
*Info* Use temporary directory '/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate'.
LIBERATE parameter "extsim_deck_dir" defaulted to cad19:/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/decks.cad19.T20210519003610741304S0014229
*Error* (char_library) : set_var extsim_use_leaf_cell is enabled, but
 not all leaf_cells have -extsim_model parameter defined. Since set_var extsim_model_include
 is not used.  Cannot continue, exiting.
*Note* : The following cells do not have -extsim_model parameter specified in define_leafcell command.
      : N_18_MM
      : P_18_MM

Peak memory usage:          340 MB
Peak virtual memory usage:  303 MB
Peak physical memory usage: 37 MB
Wall time      :    0.00 hours (3.00 seconds)
LIBERATE exited on cad19 at Wed May 19 00:36:13 2021

My char.tcl file is as follows:

define_template -type delay -index_1 {61.75 158.9 794.1} -index_2 {18.732 37.464 74.928} delay_3x3
define_template -type power -index_1 {61.75 158.9 794.1} -index_2 {18.732 37.464 74.928} power_3x3
define_template -type constraint -index_1 {61.75 158.9 794.1} -index_2 {18.732 37.464 74.928} constraint_3x3

set model "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/core_rf_v2d4.lib.scs"

set_operating_condition -voltage 0.3 -temp 25

set_var extsim_model_include \$model

define_leafcell -type nmos -pin_position {0 1 2 3} N_18_MM
define_leafcell -type pmos -pin_position {0 1 2 3} P_18_MM

read_spice -format spectre {dut.scs}

define_cell \
-input {in} \
-output {out} \
-delay delay_3x3 \
-power power_3x3 \
-constraint constraint_3x3 \
{INVX1}

define_cell \
-input {a b} \
-output {y} \
-delay delay_3x3 \
-power power_3x3 \
-constraint constraint_3x3 \
{NAND2X1 NOR2X1 AND2X1 OR2X1 XOR2X1 XNOR2X1}

char_library -extsim spectre
write_ldb lowpower.ldb
write_library lowpower.lib

I am using UMC's 180nm FDK and the MOS devices are named as N_18_MM and P_18_MM for nMOS and pMOS respectively.

I have a feeling that there's something wrong with my .tcl file

How do I go about this?

Thanks in advance!

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  • Guangjun Cao
    Guangjun Cao over 4 years ago

    Based on the history of your other post, I am guessing your netlist is created from av_extracted view. Very likely, the instances' name for the leafcells does not have "x" prefix, when the netlist is created from an av_extracted view. if this is the case, you can try to add -element option in your define_leafcell commands. Alternatively, you can extract the netlist directly with Assura/QRC, instead of using av_extracted view.

    Regards,

    Guangjun

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  • Guangjun Cao
    Guangjun Cao over 4 years ago

    in addition, you have this warning in the logfile,

    WARNING (LIB-40): (set_var): Ignored the invalid value '$model' specified for 'extsim_model_include'. It should be set to an absolute file path.

    'extsim_model_include' only take full path.

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  • iamKarthikBK
    iamKarthikBK over 4 years ago in reply to Guangjun Cao

    Yes I created the netlist using ADEL (ADE L ~> Simulation ~> Netlist ~> Create) after attaching the symbols to their respective 'av_extracted' views (ADE L ~> Setup ~> Environment ; set the first view to av_extracted).

    I also created the netlists using Assura Quantus by choosing the output format to be spice instead of av_extracted. Thanks for pointing this out, I'll try it this way. But here, I'd have to name all the .sp files (for each cell) right?

    Does this mean the nmos and pmos leaf cells were being defined automatically because N_18_MM and P_18_MM weren't 'found' in the netlist?

    extsim_model_include is being given an absolute path (starting from /) as shown in the question, sorry but I don't know if that's incorrect.

    I also see a lot of .scs files under Models/Spectre . There's a Models/Hspice as well. There's no one file called UMC.scs or so. According to the value given to '$model' in 'set model' , how can I know if that's the wrong model file? 

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  • Guangjun Cao
    Guangjun Cao over 4 years ago in reply to iamKarthikBK

    Using a netlist generated from av_extracted view is not a problem. However, if the instances' names do not have x prefix, eg. Mxxx instead of xMxxx for instance of a mos device, you need -element in define_leafcell command. This affects how a device/instances is treated by Liberate during pre-analysis stage, or by inside-view. 

    As to model files, you can use a wrapper to include all required files and sections(for spectre syntax). then assign the wrapper to extsim_model_include, and use read_spice to read in this wrapper. you need to read the instruction from the vendor to know which files/sections are required for each PVT. typically, vendors may provide an example wrapper file. 

    For netlist, you can have an all-in-one file, or cell_based files. for cell-based files, you can use the cell name as the file name, eg. INV_X1.scs for cell INV_X1. You can use foreach cell $cell {...} loop to construct a list of all netlist file, then use read_spice to read the list of netlist. An example can also be found in the <install>/example/liberate/char.tcl.  

    Regards,

    Guangjun

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  • iamKarthikBK
    iamKarthikBK over 4 years ago in reply to Guangjun Cao

    Thank you so much for your detailed and extremely well-written answer.

    I included the correct model file from 'Models' that came from the foundry.

    In the MM180_SPECTRE_MAIN_V161.lib.scs file, I see this :

    1. MM180_REG18_V124.lib.scs
    // (UMC 0.18um Regular Vt 1.8V Mixed Mode process Spice Model )
    // Model Name:
    // N_18_MM ............. 1.8V NMOS Model
    // P_18_MM ............. 1.8V PMOS Model

    and later

    include "./SPECTRE/MM180_REG18_V124.lib.scs" section=tt

    in MM180_REG18_V124.lib.scs I see

    include "./MM180_REG18_V124.mdl.scs"

    where

    model n_18_mm bsim3v3 type=n

    and

    model p_18_mm bsim3v3 type=p

    are defined along with other resistor and capacitor models.

    Liberate says this:

    ERROR (LIB-926):  The program will terminate because the definition of the sub-circuit or model for instance 'M0' could not be found. Run the following checks in the given sequence: the subcircuit or model is loaded, the first line in the model file is empty or has a comment, and the netlist syntax is correct. If no problem is found in these checks, use the 'define_leafcell' command to define the sub-circuit or model, and rerun Tcl

    As far as I know, the MM180_SPECTRE_MAIN_V161.lib.scs should behave like a wrapper by itself because it includes all the files that define the required models. Right?

    Here is the modified char.tcl file, I am using netlists that were generated using Assura Quantus instead of the one from av_extracted.

    set rundir $env(PWD)

    exec mkdir -p ${rundir}/LDB
    exec mkdir -p ${rundir}/LIBRARY
    exec mkdir -p ${rundir}/DATASHEET

    set_var slew_lower_rise 0.2
    set_var slew_upper_rise 0.8
    set_var slew_lower_fall 0.2
    set_var slew_upper_fall 0.8

    set_var measure_slew_lower_rise 0.2
    set_var measure_slew_upper_rise 0.8
    set_var measure_slew_lower_fall 0.2
    set_var measure_slew_upper_fall 0.8

    set_var max_transition 61.75e-09

    define_template -type delay -index_1 {61.75 158.9 794.1} -index_2 {18.732 37.464 74.928} delay_3x3
    define_template -type power -index_1 {61.75 158.9 794.1} -index_2 {18.732 37.464 74.928} power_3x3
    define_template -type constraint -index_1 {61.75 158.9 794.1} -index_2 {18.732 37.464 74.928} constraint_3x3

    set model "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs"

    set_operating_condition -voltage 0.2 -temp 25

    set_var extsim_model_include $model

    define_leafcell -type nmos -pin_position {0 1 2 3} N_18_MM
    define_leafcell -type pmos -pin_position {0 1 2 3} P_18_MM

    read_spice {netlist/INVX1.sp netlist/AND2X1.sp netlist/NAND2X1.sp netlist/OR2X1.sp netlist/NOR2X1.sp netlist/XOR2X1.sp netlist/XNOR2X1.sp}

    define_cell \
    -input {in} \
    -output {out} \
    -delay delay_3x3 \
    -power power_3x3 \
    -constraint constraint_3x3 \
    {INVX1}

    define_cell \
    -input {a b} \
    -output {y} \
    -delay delay_3x3 \
    -power power_3x3 \
    -constraint constraint_3x3 \
    {NAND2X1 NOR2X1 AND2X1 OR2X1 XOR2X1 XNOR2X1}

    char_library -extsim spectre
    write_ldb ${rundir}/LDB/lowpower.ldb
    write_library -overwrite ${rundir}/LIBRARY/lowpower.lib
    write_datasheet -format text ${rundir}/DATASHEET/lowpower.txt
    write_datasheet -format html ${rundir}/DATASHEET/lowpower.html

    Thank you so so much for your patience and answers Slight smile

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  • Guangjun Cao
    Guangjun Cao over 4 years ago in reply to iamKarthikBK
    iamKarthikBK said:
    define_leafcell -type nmos -pin_position {0 1 2 3} N_18_MM
    define_leafcell -type pmos -pin_position {0 1 2 3} P_18_MM

    you have not added -element option to these commands, as I suggested.

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  • iamKarthikBK
    iamKarthikBK over 4 years ago in reply to Guangjun Cao

    Sorry I forgot to put this in the previous reply,

    define_leafcell -type nmos -pin_position {0 1 2 3} -element true N_18_MM
    define_leafcell -type pmos -pin_position {0 1 2 3} -element true P_18_MM

    is this how I am supposed to do it?

    Liberate says -element takes a 'boolflag' type

    Here's the logs:

    LIBERATE parameter "extsim_model_include" set to "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/Models/Spectre/MM180_SPECTRE_MAIN_V161.lib.scs"
    too many arguments (unexpected argument(s): N_18_MM), usage:
    Var/FlagName Type Value Help
    ------------ ---- ----- ----
    (-help gives this help)
    -type string () Cell type [nmos|pmos|diode|r|c|nmos_stk|pmos_stk|nmos_soi|pmos_soi|npn|pnp|black_box]
    -pins list () Pins position, usually start from 0 <drain gate source [bulks]> | <d g1 g2 s b [int] | <terminal_p terminal_n [bulks]>
    -pin_position list () Pins position, usually start from 0 <drain gate source [bulks]> | <d g1 g2 s b [int] | <terminal_p terminal_n [bulks]>
    -length string (L) mos param name of Length (default 'L')
    -width string (W) mos param name of Width (default 'W')
    -multiple string (M) mos param name of Multiple (default 'M')
    -area string (AREA) diode param name of area (default 'AREA')
    -pj string (PJ) diode param name of pj (default 'PJ')
    -nfin string (NFIN) nfin parameter of finfet (default 'NFIN')
    -scale float (1.0) mos param scale factor (default '1.0')
    -element boolflag (false) Enable circuit element based leaf cell, model name(s) has to be given.
    -inst boolflag (false) Enable specific instance based leaf cell, instance name(s) has to be given.
    -extsim_model boolflag (false) Enable user-defined extsim-model mode and use models included by extsim_deck_header
    cellNames list () List of leaf cell names or model names (if -element present)
    while executing
    "::tcl::OptKeyParse define_leafcell $args"
    (procedure "define_leafcell" line 1)
    invoked from within
    "define_leafcell -type nmos -pin_position {0 1 2 3} -element true N_18_MM "
    (file "/home/TSMC/Desktop/UMC180/Designkits/Cadence_6.1/lowpower/liberate/tcl/char.tcl" line 29)

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  • Guangjun Cao
    Guangjun Cao over 4 years ago in reply to iamKarthikBK
    iamKarthikBK said:
    define_leafcell -type nmos -pin_position {0 1 2 3} -element true N_18_MM
    define_leafcell -type pmos -pin_position {0 1 2 3} -element true P_18_MM

    should be,

    define_leafcell -element -type nmos -pin_position {0 1 2 3}  N_18_MM
    define_leafcell -element -type pmos -pin_position {0 1 2 3}  P_18_MM

    please read the reference manual for more details.

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  • iamKarthikBK
    iamKarthikBK over 4 years ago in reply to Guangjun Cao
    Guangjun Cao said:
    define_leafcell -element -type nmos -pin_position {0 1 2 3}  N_18_MM
    define_leafcell -element -type pmos -pin_position {0 1 2 3}  P_18_MM

    Still gives me

    ERROR (LIB-926): The program will terminate because the definition of the sub-circuit or model for instance 'M0' could not be found. Run the following checks in the given sequence: the subcircuit or model is loaded, the first line in the model file is empty or has a comment, and the netlist syntax is correct. If no problem is found in these checks, use the 'define_leafcell' command to define the sub-circuit or model, and rerun Tcl

    Guangjun Cao said:
    please read the reference manual for more details.

    Okay! I'll do that!

    Thank you so much!

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  • Guangjun Cao
    Guangjun Cao over 4 years ago in reply to iamKarthikBK
    iamKarthikBK said:
    ERROR (LIB-926): The program will terminate because the definition of the sub-circuit or model for instance 'M0' could not be found

    please share the line for instance 'M0' in your netlist. in addition, share all your read_spice commands and full logfile, the contents of your model wrapper. make sure, the first line in the model file is empty or has a comment. check if the devices names in model files and netlist are both in upper case.

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