Using the same output expressions for post-layout simulation

Previously, I worked on smaller circuits and never had any need to probe inner nodes, just characterized the circuit performance from the output pins.
Now, I want to probe inner nodes and use the same output expressions for post-layout simulation.
I almost always use "expr" type for the outputs.
From here[1] and here[2], it seems that I need to create .simrc file.
But still cannot make it works.


In order to be sure, now I am doing Lab3 section from here[2], it shows that outputs with type "signal" and "expr" work well.


But that is not the case when I try it. I cannot make output with the type "expr" works.
This is actually my original problem.


Modification of .simrc for "signal" type of outputs is explained in here[1],  but not the ones with "expr" type.
did I miss anything here?

Again, my main target is using the same output expressions both for pre- and post-layout simulation.
If there is another way to achieve this other than what has been explained in here[1] and here[2],I would like to be informed.