• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. Writing into a file in Verilog-A Model

Stats

  • Locked Locked
  • Replies 2
  • Subscribers 125
  • Views 8916
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Writing into a file in Verilog-A Model

Ketrin
Ketrin over 3 years ago

Dear All,

I want to write the data into a file in the Verilog-A model.

I tried something like below.  It is not showing any errors, but the file is still empty. By the way, reading from this file works great. 

`include "constants.vams"

`include "disciplines.vams"

integer fd;

real r_file = 0.001;

analog begin fd = $fopen("./my_file.txt", "w");

$fwrite(fd, "%e", r_file);

//outp = $fscanf(fd, "%e", r_file);

$fclose(fd);

end

endmodule

I also tried $fdisplay but the result didn't change. 

  • Cancel
Parents
  • Andrew Beckett
    Andrew Beckett over 3 years ago

    This works for me. It will write the file into the netlist directory (if used with ADE). It's going to write a file at each iteration which is almost certainly not what you want, but it does write each time. I added the missing module definition (was missing in your example):

    `include "constants.vams"
    `include "disciplines.vams"
    
    module forum146;
    
    integer fd;
    
    real r_file = 0.001;
    
    analog begin fd = $fopen("./my_file.txt", "w");
    
    $fwrite(fd, "%e", r_file);
    
    //$debug("written again\n");
    //outp = $fscanf(fd, "%e", r_file);
    
    $fclose(fd);
    
    end
    
    endmodule
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Reply
  • Andrew Beckett
    Andrew Beckett over 3 years ago

    This works for me. It will write the file into the netlist directory (if used with ADE). It's going to write a file at each iteration which is almost certainly not what you want, but it does write each time. I added the missing module definition (was missing in your example):

    `include "constants.vams"
    `include "disciplines.vams"
    
    module forum146;
    
    integer fd;
    
    real r_file = 0.001;
    
    analog begin fd = $fopen("./my_file.txt", "w");
    
    $fwrite(fd, "%e", r_file);
    
    //$debug("written again\n");
    //outp = $fscanf(fd, "%e", r_file);
    
    $fclose(fd);
    
    end
    
    endmodule
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Children
  • Ketrin
    Ketrin over 3 years ago in reply to Andrew Beckett

    Thanks! I've added the check loop, so it doesn't write a file at each iteration now. 

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information