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Cadence Vrituoso

younghyun

I was making an inverter out of  Verilog-A a using the Cadence Vertuoso tool (IC618)

but an error occured.

------------------------------------------log------------------------------------------

(TE-7051): Saved changes to /home/isdl/sangmyung/inv/veriloga/veriloga.va
(TE-4223): Extracting cellview 'sangmyung inv veriloga' ...
WARNING : There is some issue in invoking spectre command for parsing the text file /home/isdl/sangmyung/inv/veriloga/veriloga.va .
Make sure that the setting is proper
*WARNING* (TE-1308): Failed to perform syntax check for cellview 'sangmyung inv veriloga'.
*WARNING* (TE-1312): Compilation errors or warnings have been detected in the HDL file for cellview 'sangmyung inv veriloga'. To view the parse log for details, choose 'Parser Log File' from the 'View' menu.
*WARNING* (TE-4309): Extract failed for cellview 'sangmyung inv veriloga'

--------------------------------------------------------------------------------------------------

I wrote the code in verilog-A like this:

`include "constants.vams"
`include "disciplines.vams"

module inv(in, out);
input in;
output out;
electrical in, out;
parameter real threshold = 0.5;
real result;

analog begin
result = ((V(in) > threshold) ? 0 : 1);
V(out) <+ result;
end

endmodule

I think there is no problem wih the code.

and if I press the "Build a database of instances, nets and pins found in file" button, and extract failed error occurs.

How do i solve this problem

plz help me

Parents Reply
  • in reply to younghyun

    You need to ensure that your UNIX path (in the $PATH variable since you're using bash, it seems) contains the <SPECTREinstDir>/bin directory. You must have the IC release in your path already to run virtuoso - so check your $PATH env var and you'll need to add the spectre release (e.g. SPECTRE211) to that path. Otherwise you're not going to be able to simulate with spectre either.

    Andrew

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