Design Intent questions

Hi,

we plan to adopt this feature, and have the RAK, but several questions popped up on how to use it:

1. There is a feature to define a circuit half, to let it match to the other half. This is nice, but what to do with shared devices like the current source of a diffpair, or the input transistor of a current mirror.

In the RAK these devices are kept out, but this way the layout can be still have a bad asymmetry if e.g. the input current mirror transistor (or a diffpair current source) is not in the symmetry line!

2. I see you can use Design Intent for high-current designs, but can I also set to require a certain max net capacitance? This would be helpful for all kind of very sensitive circuits or RF designs.

3. Will I get a report on violations, if if the layout is not 100% symmetrical, how much routing R and net cap asymmetry I will get (unfortunately)?

4. Can we use DI to define or check e.g. on pin currents?

5. Like 4: Can DI help to check on transistor operating regions?

Bye Stephan