How to derive edge phase noise from Output Noise in sampled Pnoise simulation

Edge Phase Noise is related to Jitter. If you want to compare it to Sampled Pnoise, you need to take into account the slope of the signal at the threshold crossing as well.

Edge Phase Noise has been defined in a way so that it can be directly used in formulas that were originally developed for the SSB Phase Noise of sinusoidal oscillators. 

Dear mxm14,

As Frank correctly notes, the phase noise computation involves the entire waveform whereas the edge jitter examines the sampled noise at a threshold. There is an application note entitled "Why is pnoise sampled(jitter) different than pnoise timeaverage on a driven circuit?" that might be of interest to aid your understanding. Using the example it provides for a driven inverter (similar to your driven inverter), I have compared their result with your result. Note that the edge phase noise is different when the threshold is defined for the rising and falling edges.

I hope this helps.

Shawn

Figure 1

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Shawn, I don't think that this is the problem here. He is already looking at sampled pnoise, not timeaverage.

If I could figure out how to upload an image, I could show you the mathematics between jitter and edge phase noise.   (I'm writing an appNote on the topic with R&D - full disclosure:  they did all the mathematics!)   

For information on Edge Phase Noise, I recommend:

• Spectre Circuit Simulator and Accelerated Parallel Simulator RF Analysis in ADE Explorer User Guide -- Single Input Large and Small-signal Analyses - Driven Circuits 
• How to set up pss/pnoise sampled(jitter) when simulating a driven circuit or a VCO, both containing dividers 
• Noise Analysis Enhancements for Modern Communications Systems 

Addressing the difference between timeaverage phase noise (PM) and sampled (jitter) edge phase noise, see Article:  Why is pnoise sampled(jitter) different than pnoise timeaverage on a driven circuit?  Timeaverage phase noise is meant for oscillators.

Best regards,

Tawna

Hi Tawna,

The menu at the bottom of the text entry box has an item Insert -> Image/video/file

Yes, I know.  Let me fight with this a bit more.  

Success!!!   Finally able to upload Sampled Noise.  

Dear mxm14,

mxm14 said:

It s not clear for me how the edge phase noise is obtained....What i m doing wrong?

As I noted in your prior Forum post (which was flagged as spam and hopefully will be released), I have attempted to clarify my understanding of the various jitter definitions and the relationship between sampled voltage noise error and Jee. The note include two simulation sets using the example circuit Cadence provides in their application note regarding Jee and driven circuits and shows the limitation of using the slew rate of a waveform to accurately estimate Jee from the sampled voltage error. I also found a number of potential corrections to the Cadence note and have documented them with my suggestions for potential corrections. The note is at URL:

www.dropbox.com/s/3m531dl4fl7bwbr/jee_computation_example_sml_032823v1p0.pdf?dl=0

and the summary on page 76 shown in Figure 1 to save anyone with an interest some time.

Shawn

Figure 1