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MC stuck in ams simulation

sjwprcker

Hi, 

I have a tran sim using ams simulator with Monte Carlo sampling. There is only one clock generator written in verilogams creating a digital clock as

////////////////////////////////////////////////////////

`include "constants.vams"
`include "disciplines.vams"
`timescale 1ns / 100ps
module clk_vams (clk, freq_1e6);

input freq_1e6;
output clk;

electrical freq_1e6;
reg clk_int;
real freq;

initial clk_int = 0;


always begin
freq = V(freq_1e6)*1e6;
#(0.5e9 / freq) clk_int = ~clk_int;
end


assign clk=clk_int;

endmodule

///////////////////////////////////////

This code works well in normal simulation, but not work in MC simulation. The log shows that simlation is stuck at beginning (time = 0) without reporting any error. 

My spectre version is 21.1.0.664, isr16, and xcelium version is 22.03-s001. 

BR

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