Help on creating layout for a symmetric circuit by stitching two "half-layout"

Hi all.

Recently I was given a symmetric circuit and told to create a layout for it. Under my tutor's instruction, I removed half of the instances and created a half-circuit, from which I created a layout. Then in a new layout I imported the half-layout, mirrored it and stitched them together.

After some routing it could pass DRC and LVS check so I knew it's correct, but in the process of routing I found it annoying that all nets and (sub-)cells did not have any name, and I had to resort to my memory.

Following some instructions online I set both layout to transparent to establish device correspondence, but there weren't any change in the layout. New routing in the top level got their inferred name - but they were all wrong.

I'd like to ask what is the best practice of creating layout that takes the advantage of symmetry? Or maybe I should manually place the cells symmetrically?