How to override the default values using Verilog netlist.

I am trying to import a netlist to generate an array of verilog-a module block (for test doublerr. va).  I have already created a cell and symbol for this module.  when importing the netlist the array is made but with the default parameter values. how to override the default values?

doublerr. va

`include "constants.vams"
`include "disciplines.vams"

module vdoublerr (in, out);
input in;
output out;
electrical in, out;
parameter real parm1 = 0.2;
parameter real parm2 = 0.1;
parameter real parm3 = 5.0;

analog begin
V(out) <+ (parm1 + parm2 + parm3) * V(in);
end

endmodule

Netlist

`timescale 1ns / 1ns
module netlisting_500_schematic (clause, data);

inout [1:2] clause;
inout [1:4] data;

specify
specparam CDS_LIBNAME = "netlisting";
specparam CDS_CELLNAME = "netlisting_500_schematic";
specparam CDS_VIEWNAME = "schematic";
endspecify

vdoublerr I3 (.out(clause[2]), .in(data[4]));
vdoublerr I2 (.out(clause[2]), .in(data[3]));
vdoublerr I1 (.out(clause[1]), .in(data[2]));
vdoublerr I0 (.out(clause[1]), .in(data[1]));
defparam
I0.parm1 = 100.0;

endmodule