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Fail LVS extraction

BARID

Hello everyone,

I did a layout of a schematic circuit and I passed the DRC test but I can't seem to launch the layout versus schematic test because it fails to generate the netlist everytime. I have the error "Schematic export failed or was cancelled. Please consult the transcript in the viewer window". It's especially weird because my collegue helped me and I did the same steps as him but I get the error and not him.

The skill consol indicates that there is an error in netlist procedure : 
"*ERROR* Error Detected in netlisting, netlist bypass flag set.

*ERROR* Could not find netlist procedure : 'ansCdlCompPrim_b55x'

component : npnxhs

named : /Q0

in cellview : schetest/schematic

of library : test

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