Characterizing cells with verilog-A models by liberate, but the model or instance can not be found

Hi, I've been trying to perform cell characterization for a basic inverter and generate a .lib file for it. The technology we used doesn't have a PMOS transistor so the schematic is implemented using nmos.

But the model or netlist could not be recognized although I have added "define_leafcell" and "extsim_deck_header" as supposed. Could someone help me please

char.tcl:

# Set the run directory. Here we use PWD, but in a distributed
# environment, it is recommended to directly specify the full path
# instead of using "PWD"
set rundir $env(PWD)

# Create the directories Liberate will write to.
exec mkdir -p ${rundir}/LDB
exec mkdir -p ${rundir}/LIBRARY
exec mkdir -p ${rundir}/DATASHEET

### Define temperature and default voltage ###
set_operating_condition -voltage 1.5 -temp 125

## Load template information for each cell ##
source ${rundir}/TEMPLATE/template_example.tcl

## Load Spice models and subckts ##
set extsim_exclusive 1
set_var extsim_deck_header ".hdl $rundir/MODELS/veriloga.va"
define_leafcell -type nmos -pin_position {0 1 2 3} {nch}
set_var extsim_model_include $rundir/MODELS/section_mos.scs

set spicefiles $rundir/MODELS/section_mos.scs
foreach cell $cells {
lappend spicefiles ${rundir}/NETLIST/${cell}.sp
}
read_spice $spicefiles

## Characterize the library for NLDM (default), CCS and ECSM timing.
char_library -ccs -ecsm -cells ${cells}

## Save characterization database for post-processing ##
write_ldb ${rundir}/LDB/example.ldb

## Generate a .lib with ccs, ecsm ###
write_library -overwrite -ccs ${rundir}/LIBRARY/example_ccs.lib
write_library -overwrite -ecsm ${rundir}/LIBRARY/example_ecsm.lib

## Generate ascii datatsheet ###
write_datasheet -format text ${rundir}/DATASHEET/example

log:

LIBERATE parameter "slew_lower_rise" set to "0.3"
LIBERATE parameter "slew_upper_rise" set to "0.7"
LIBERATE parameter "slew_lower_fall" set to "0.3"
LIBERATE parameter "slew_upper_fall" set to "0.7"
LIBERATE parameter "measure_slew_lower_rise" set to "0.3"
LIBERATE parameter "measure_slew_upper_rise" set to "0.7"
LIBERATE parameter "measure_slew_lower_fall" set to "0.3"
LIBERATE parameter "measure_slew_upper_fall" set to "0.7"
LIBERATE parameter "max_transition" set to "1.5e-09"
LIBERATE parameter "extsim_deck_header" set to ".hdl /homes/RuiLi/liberate/file/liberate/MODELS/veriloga.va"
INFO (LIB-511): (define_leafcell): Leafcell 'nch' (instance) has been identified with pin_position (0 1 2 3) mapped to (D G S B).
LIBERATE parameter "extsim_exclusive" set to "1"
LIBERATE parameter "extsim_model_include" set to "/homes/RuiLi/liberate/file/liberate/MODELS/section_mos.scs"
LIBERATE parameter "spectre_pwr" set to "0"
LIBERATE parameter "simulator" set to "ski"
LIBERATE parameter "char_library_skip_var_list" set to ""
Start Characterizing Library at (Fri Jan 17 16:56:54 CST 2025)

*Info* Removing all types
*Info* Max Shared Memory Segments : 4096
*Info* No unattached Shared Memory Segments belonging to RuiLi out of 434 total.
*Info* Max Semaphore Arrays : 128
*Info* No unattached Semaphore Arrays belonging to RuiLi out of 1 total.
*Info* Max Message Queues : 32000
*Info* No Message Queues
*Info* Zombie Process 'lsb_release' isn't 'spectre' related. Skipping.
*Info* Zombie Process 'whoami' isn't 'spectre' related. Skipping.
*Info* Zombie Process 'lsb_release' isn't 'spectre' related. Skipping.
*Info* Zombie Process 'whoami' isn't 'spectre' related. Skipping.
ERROR (LIB-926): The program will terminate because the definition of the sub-circuit or model for instance 'M0' could not be found. Run the following checks in the given sequence: the subcircuit or model is loaded, the first line in the model file is empty or has a comment, and the netlist syntax is correct. If no problem is found in these checks, use the 'define_leafcell' command to define the sub-circuit or model, and rerun Tcl