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Stability Analysis of a Ramp Generator Circuit in Integration Phase

baltaci

Dear Cadence Community,

I am a user of IC23.1.

I am designing a ramp generator circuit that operates in two phases, controlled by non-overlapping clock signals ϕ1 and ϕ2. Below is a schematic representation of the circuit:

Behaviour:

  • When ϕ1 = 1, a switch shorts the feedback capacitor, and the opamp operates as a unity-gain buffer.
  • When ϕ2 = 1, the switch controlled by ϕ1 is open, and the only feedback element is the capacitor. A constant current source is connected to the inverting input of the opamp, generating a linearly increasing ramp at the output.

Stability Analysis Concern

For the case when ϕ1 = 1, stability analysis is straightforward because the circuit behaves as a unity-gain buffer. Running an STB analysis in this case is simple.

However, for the case when ϕ2 = 1, stability analysis presents several challenges:

  • The circuit has no single DC operating point due to the ramp behavior.
  • A standard DC analysis would likely result in the opamp output saturating to the power supply, which is not useful for stability analysis.
  • My problem is that I do not even know how to run a single stability analysis during this phase (ϕ2 = 1) because the STB analysis would not be run at a DC operating point that one would be interested in, since it is not a stable DC operating point.

The equivalent circuit for the ϕ2 = 1 phase is shown below:

What is the recommended methodology to perform a stability analysis in such situations?

I appreciate any guidance or insights on this topic.

Best regards,
Can

Parents

  • Hi,

    the circuit is an integrator. If input is not periodic but e.g. fix, a non-periodic output will be present, but still stability can be checked. Run Transient, and use actimes
    & acnames (=stb) feature (best for different phases). This will check the stability of the integrator alone, so you get e.g. the phase margin for the op-amp.

    If the system is more complex like forming an SC filter, go for pss+pstb analyses.

    Bye Stephan

Reply

  • Hi,

    the circuit is an integrator. If input is not periodic but e.g. fix, a non-periodic output will be present, but still stability can be checked. Run Transient, and use actimes
    & acnames (=stb) feature (best for different phases). This will check the stability of the integrator alone, so you get e.g. the phase margin for the op-amp.

    If the system is more complex like forming an SC filter, go for pss+pstb analyses.

    Bye Stephan

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