• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. Issue with Level=3 MOS model in Spectre

Stats

  • Replies 16
  • Subscribers 126
  • Views 2970
  • Members are here 0

Issue with Level=3 MOS model in Spectre

milind123
milind123 3 months ago

Hi, 

    I am trying to simulate the FET model that I downloaded from the manufacturer. I have always been able to use Spice models by using the statement:

simulator lang=spice

before the model. But this time it complained on a statement:

B11 3 2 I= V(13,0)*I(V11)

It said that the master was unknown. After struggling a bit I decided to just write the model subckt as spectre syntax. I did that. For 2 .model statements inside I just put the "simulator lang=spice" statement before them and then

"simulator lang=spectre" after them

This helped the simulation to run but the FET characteristics are totally off. I know the model is fine since I simulated it in Spice. The FET characteristic is totally set by the nmos .model defined in the subcircuit. The model is a level=3 model and now I am considering whether I need to translate the model to Spectre. But I am not able to find how to translate a level=3 spice model to spectre because don't know what master name to use in the model statement.

Any guidance in this would be greatly appreciated.

  • Sign in to reply
  • Cancel
Parents
  • Andrew Beckett
    Andrew Beckett 3 months ago

    I joined your two posts because they appear to be asking the same thing.

    Note that the Spectre model for a level 3 MOS is "mos3" (see "spectre -h mos3")

    Andrew

    • Cancel
    • Vote Up 0 Vote Down
    • Sign in to reply
    • Cancel
  • milind123
    milind123 3 months ago in reply to Andrew Beckett

    I am simulating in an old version of spectre:

    Version 15.1.0.803.isr18 64bit -- 21 Jun 2017

    I am simulating the following model:

    https://assets.nexperia.com/documents/spice-model/PSMN8R5-40MSD.lib

    After running it as a Spectre model the MOS characteristic does not look right, i.e. the MOS Ids-Vds characteristic is orders of magnitude different. My translated spectre model is pasted below:


    subckt PSMN8R5_40MSD D G S B

    * Package impedance
    LD (D 5) inductor l=20.00p
    RLD2 (D 5) resistor r=25.13m
    RLD1 (5 4) resistor r=5.000u
    LG (G 1) inductor l=1.509n
    RLG (G 1) resistor r=1.896
    LS (S 8) inductor l=440.0p
    RLS2 (S 8) resistor r=552.9m
    RLS1 (8 7) resistor r=450.0u

    * Drain,gate and source resistances
    RD (3 4) resistor r=5.913m TC1= 6.580m TC2= 1.004n
    RG (1 2) resistor r=805.9m
    RS (6 7) resistor r=1.000u
    RBULK (S B) resistor r=1.000u

    * Body Diode
    RBD (9 4) resistor r=1.911m TC1= 4.000m TC2= 23.00u
    DBD (7 9) D_DBD
    RDS (7 4) resistor r=40.00M TC1= -5.000m

    * Internal MOS
    M1 (3 2 6 6) MINT

    * Gate leakage and gate capacitance
    RGS (2 6) resistor r=200.0M
    CGS (2 6) capacitor c=927.5p

    * CGD
    C11 (11 12) capacitor c=1E-12
    V11 (11 0) vsource dc=0 type=dc
    B11 (3 2) bsource I=V(13)*I(V11)
    E11 (12 0 3 2) vcvs gain=1
    E12 13 0 vsource v = table(v(12), -20.0, 287.92, -16.0, 287.86, -15.0, 287.87, -12.0, 287.87, -10.0, 287.85, -8.0, 287.88, -6.0, 287.86, -5.0, 287.87, -4.0, 287.86, -3.0, 287.69, -2.0, 286.80, -1.0, 275.62, -0.5, 236.32, -0.2, 220.97, -0.1, 220.76, 0.0, 200.6204, 0.1, 180.444, 0.2, 180.7272, 0.5, 164.752, 1.0, 142.2876, 2.0, 108.7704, 3.0, 85.0832, 4.0, 67.9872, 5.0, 57.4872, 6.0, 51.7236, 8.0, 47.49, 10.0, 46.824, 12.0, 46.364, 15.0, 45.4972, 16.0, 45.2384, 20.0, 44.1484, 25.0, 43.1592, 30.0, 42.5252, 32.0, 42.3004)

    * E12 (13 0) TABLE {V(12)}
    * + (-20.0,287.92) (-16.0,287.86) (-15.0,287.87) (-12.0,287.87) (-10.0,287.84999999999997) (-8.0,287.88) (-6.0,287.86) (-5.0,287.87) (-4.0,287.86) (-3.0,287.69) (-2.0,286.79999999999995) (-1.0,275.61999999999995) (-0.5,236.31999999999996) (-0.2,220.97) (-0.1,220.76) (0.0,200.6204) (0.1,180.444) (0.2,180.72719999999995) (0.5,164.75200000000004) (1.0,142.2876) (2.0,108.7704) (3.0,85.08319999999999) (4.0,67.98720000000002) (5.0,57.4872) (6.0,51.72359999999999) (8.0,47.49) (10.0,46.824) (12.0,46.364000000000004) (15.0,45.4972) (16.0,45.23840000000001) (20.0,44.1484) (25.0,43.1592) (30.0,42.525199999999984) (32.0,42.300399999999996)


    model MINT mos3 Vto= 4.100 Kp= 167.8 Nfs= 1.062T Eta= 0.000
    + Level= 3 Gamma= 0.000 Phi= 600.0m Is= 1.000E-24 UO= 600.0
    + Js= 0.000 Pb= 800.0m Cj= 0.000 Cjsw= 0.000 Cgso= 0.000 Cgdo= 0.000 Cgbo= 0.000
    + Tox= 100.0n Xj= 0.000
    + Vmax= 403.3

    model D_DBD diode Bv= 44.00 Ibv= 250.0u Rs= 1.000u Is= 385.9f
    + N= 1.000 M= 392.5m VJ= 621.9m Fc= 500.0m Cjo= 1.592n Tt= 13.61n


    ends PSMN8R5_40MSD


    • Cancel
    • Vote Up 0 Vote Down
    • Sign in to reply
    • Cancel
Reply
  • milind123
    milind123 3 months ago in reply to Andrew Beckett

    I am simulating in an old version of spectre:

    Version 15.1.0.803.isr18 64bit -- 21 Jun 2017

    I am simulating the following model:

    https://assets.nexperia.com/documents/spice-model/PSMN8R5-40MSD.lib

    After running it as a Spectre model the MOS characteristic does not look right, i.e. the MOS Ids-Vds characteristic is orders of magnitude different. My translated spectre model is pasted below:


    subckt PSMN8R5_40MSD D G S B

    * Package impedance
    LD (D 5) inductor l=20.00p
    RLD2 (D 5) resistor r=25.13m
    RLD1 (5 4) resistor r=5.000u
    LG (G 1) inductor l=1.509n
    RLG (G 1) resistor r=1.896
    LS (S 8) inductor l=440.0p
    RLS2 (S 8) resistor r=552.9m
    RLS1 (8 7) resistor r=450.0u

    * Drain,gate and source resistances
    RD (3 4) resistor r=5.913m TC1= 6.580m TC2= 1.004n
    RG (1 2) resistor r=805.9m
    RS (6 7) resistor r=1.000u
    RBULK (S B) resistor r=1.000u

    * Body Diode
    RBD (9 4) resistor r=1.911m TC1= 4.000m TC2= 23.00u
    DBD (7 9) D_DBD
    RDS (7 4) resistor r=40.00M TC1= -5.000m

    * Internal MOS
    M1 (3 2 6 6) MINT

    * Gate leakage and gate capacitance
    RGS (2 6) resistor r=200.0M
    CGS (2 6) capacitor c=927.5p

    * CGD
    C11 (11 12) capacitor c=1E-12
    V11 (11 0) vsource dc=0 type=dc
    B11 (3 2) bsource I=V(13)*I(V11)
    E11 (12 0 3 2) vcvs gain=1
    E12 13 0 vsource v = table(v(12), -20.0, 287.92, -16.0, 287.86, -15.0, 287.87, -12.0, 287.87, -10.0, 287.85, -8.0, 287.88, -6.0, 287.86, -5.0, 287.87, -4.0, 287.86, -3.0, 287.69, -2.0, 286.80, -1.0, 275.62, -0.5, 236.32, -0.2, 220.97, -0.1, 220.76, 0.0, 200.6204, 0.1, 180.444, 0.2, 180.7272, 0.5, 164.752, 1.0, 142.2876, 2.0, 108.7704, 3.0, 85.0832, 4.0, 67.9872, 5.0, 57.4872, 6.0, 51.7236, 8.0, 47.49, 10.0, 46.824, 12.0, 46.364, 15.0, 45.4972, 16.0, 45.2384, 20.0, 44.1484, 25.0, 43.1592, 30.0, 42.5252, 32.0, 42.3004)

    * E12 (13 0) TABLE {V(12)}
    * + (-20.0,287.92) (-16.0,287.86) (-15.0,287.87) (-12.0,287.87) (-10.0,287.84999999999997) (-8.0,287.88) (-6.0,287.86) (-5.0,287.87) (-4.0,287.86) (-3.0,287.69) (-2.0,286.79999999999995) (-1.0,275.61999999999995) (-0.5,236.31999999999996) (-0.2,220.97) (-0.1,220.76) (0.0,200.6204) (0.1,180.444) (0.2,180.72719999999995) (0.5,164.75200000000004) (1.0,142.2876) (2.0,108.7704) (3.0,85.08319999999999) (4.0,67.98720000000002) (5.0,57.4872) (6.0,51.72359999999999) (8.0,47.49) (10.0,46.824) (12.0,46.364000000000004) (15.0,45.4972) (16.0,45.23840000000001) (20.0,44.1484) (25.0,43.1592) (30.0,42.525199999999984) (32.0,42.300399999999996)


    model MINT mos3 Vto= 4.100 Kp= 167.8 Nfs= 1.062T Eta= 0.000
    + Level= 3 Gamma= 0.000 Phi= 600.0m Is= 1.000E-24 UO= 600.0
    + Js= 0.000 Pb= 800.0m Cj= 0.000 Cjsw= 0.000 Cgso= 0.000 Cgdo= 0.000 Cgbo= 0.000
    + Tox= 100.0n Xj= 0.000
    + Vmax= 403.3

    model D_DBD diode Bv= 44.00 Ibv= 250.0u Rs= 1.000u Is= 385.9f
    + N= 1.000 M= 392.5m VJ= 621.9m Fc= 500.0m Cjo= 1.592n Tt= 13.61n


    ends PSMN8R5_40MSD


    • Cancel
    • Vote Up 0 Vote Down
    • Sign in to reply
    • Cancel
Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information