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  3. Recovering "actionable" netlist from GDS II

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Recovering "actionable" netlist from GDS II

GS202507021424
GS202507021424 8 days ago

I'm interested in the extent to which one can recover usable netlist information from a GDS IIfile.

Assuming the GDS II was produced based on [gpdk|gsclib|giolib]045, and the original schematic (or Verilog source) was subsequently lost, I'm wondering if it is possible to recover enough information about the standard cell netlist to attempt redoing the synthesis (Genus) and place-and-route (Innovus) flows (presumably after having made some additional changes/edits to the netlist).

Right now, I can stream-import the GDS II into Virtuoso as a layout view. I can run Assura LVS to compare this against a dummy schematic: even though the comparison itself will fail, the run will produce an extracted netlist from the layout as a byproduct (*.ldb and/or *.lnnfiles, apparently generated via dfIIToVdb).

I dug around the documentation I could find, and while there's a lot of talk about dfIIToVldb, there's nothing on dfIIToVdb, and I'm a bit confused about what the difference might be between the two, and the output they produce.

I'm wondering what tools there exist to then view and/or convert the extracted netlist information (e.g., the aforementioned *.ldb/*.lnn file formats), into either Verilog or anything else that can be edited and passed back as input to Genus & Innovus for subsequent synthesis, placement, and routing.

Also, I wonder if there's a less roundabout way of extracting actionable netlist information (down to standard cells) directly from a GDS II file...

Any advice much appreciated!

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  • Andrew Beckett
    Andrew Beckett 5 days ago

    I didn't see this post, but you could use vldbToSpice (or vldbToCdl) on the *.lnn file. There's nothing to output to Verilog. I suspect it might be a challenge to use the result as it will be missing meaningful names, but maybe it's better than nothing.

    Andrew

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  • GS202507021424
    GS202507021424 1 day ago in reply to Andrew Beckett

    Thanks!

    What's the difference, if any, between running vldbTo[Spice | Cdl] on the *.lnn file versus on the *.ldb file ? The latter appears to generate additional attributes for each line of output (and overall seems to be a more "detailed" version of the former). Is the extra detail just useless for the stated purpose, or actively undesirable?

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  • Andrew Beckett
    Andrew Beckett 1 day ago in reply to GS202507021424
    GS202507021424 said:
    What's the difference, if any, between running vldbTo[Spice | Cdl] on the *.lnn file versus on the *.ldb file ?

    <runName>.ldb  The layout netlist containing the raw count of canonical devices
    <runName>.lnn The resulting normalized layout netlist after Assura consolidates parallel or series connected devices
    <runName>.sdb The schematic netlist containing the raw count of canonical devices
    <runName>.snn 

    The resulting normalized schematic netlist after Assura consolidates parallel or series connected devices

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  • Andrew Beckett
    Andrew Beckett 1 day ago in reply to GS202507021424
    GS202507021424 said:
    What's the difference, if any, between running vldbTo[Spice | Cdl] on the *.lnn file versus on the *.ldb file ?

    <runName>.ldb  The layout netlist containing the raw count of canonical devices
    <runName>.lnn The resulting normalized layout netlist after Assura consolidates parallel or series connected devices
    <runName>.sdb The schematic netlist containing the raw count of canonical devices
    <runName>.snn 

    The resulting normalized schematic netlist after Assura consolidates parallel or series connected devices

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