Custom IC Design

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Discussion

how to varies the threshold voltage for mos transistor??

Category: Custom IC Design

By vishnu4830

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updated over 9 years ago by DeeMJ

7 replies • 23492 views
Discussion

Netlist schematic to Verilog: Preserve "var real" port type across entire netlist

Category: Custom IC Design

By jyang4

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started over 9 years ago

0 replies • 1323 views
Discussion

Virtuoso Layout Editor net highlighting

Category: Custom IC Design

By apple419

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updated over 9 years ago by apple419

2 replies • 16551 views
Discussion

test vector creation for ATE

Category: Custom IC Design

By apple419

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updated over 9 years ago by apple419

4 replies • 17522 views
Discussion

Abstract Generator: Terminals not accessible, off-grid pins

Category: Custom IC Design

By marten

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updated over 9 years ago by marten

1 replies • 15199 views
Discussion

middle-of-line (MOL) layers

Category: Custom IC Design

By vishnu4830

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updated over 9 years ago by Andrew Beckett

1 replies • 14021 views
Discussion

Exporting values of resistances and currents to a text file

Category: Custom IC Design

By rafaelon

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updated over 9 years ago by Andrew Beckett

1 replies • 13606 views
Discussion

Setting snap grid spacings

Category: Custom IC Design

By J Wilwert

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updated over 9 years ago by Andrew Beckett

6 replies • 22954 views
Discussion

IC61x vs ICADV12x

Category: Custom IC Design

By aceduke

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updated over 9 years ago by Andrew Beckett

1 replies • 15219 views
Discussion

Incorrect device parameters (as, ad, ps, pd) extracted by calibre PEX

Category: Custom IC Design

By ntang

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updated over 9 years ago by Andrew Beckett

1 replies • 14863 views
Discussion

diva extract set switches error

Category: Custom IC Design

By sdineshkumar

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updated over 9 years ago by Andrew Beckett

6 replies • 17036 views
Discussion

Problem after cdb2oa translation

Category: Custom IC Design

By DevB

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updated over 9 years ago by DevB

1 replies • 13787 views
Discussion

Verilog-A transition filter warning from spectre

Category: Custom IC Design

By CTDSM

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updated over 9 years ago by Andrew Beckett

1 replies • 16170 views
Discussion

Problem with Calibre LVS_ IC6

Category: Custom IC Design

By tahm

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updated over 9 years ago by Andrew Beckett

1 replies • 3374 views
Discussion

Voltage out to next stage- cadence and verilogA

Category: Custom IC Design

By Nishtha Sharma

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started over 9 years ago

0 replies • 504 views

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