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Custom IC Design

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  • Discussion

    ERROR (VACOMP-1008): Cannot compile ahdlcmi module library.

    Category: Custom IC Design

    By VoTuanMinh

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    updated over 6 years ago by Andrew Beckett

    11 replies • 21224 views
  • Discussion

    Running ADE L several times in a day

    Category: Custom IC Design

    By ArmanHR

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    updated over 6 years ago by Andrew Beckett

    3 replies • 14051 views
  • Discussion

    Virtuoso Chip Assembly Router in 6.1.8

    Category: Custom IC Design

    By mhkvy4

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    updated over 6 years ago by mhkvy4

    2 replies • 15275 views
  • Discussion

    How get the "eventtime" variable calculated and used in the sampled PAC analysis

    Category: Custom IC Design

    By groviere

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    updated over 6 years ago by groviere

    2 replies • 2105 views
  • Discussion

    hspiceD flat netlisting using -replay

    Category: Custom IC Design

    By John Barth

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    •

    updated over 6 years ago by John Barth

    2 replies • 2095 views
  • Discussion

    spectre tran simulation and multithreading

    Category: Custom IC Design

    By marcelpreda

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    •

    updated over 6 years ago by marcelpreda

    4 replies • 18959 views
  • Discussion

    Monte Carlo simulation: there are two peaks

    Category: Custom IC Design

    By syncteck

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    •

    updated over 6 years ago by syncteck

    8 replies • 17367 views
  • Discussion

    The way to toggle between assembler and schematic

    Category: Custom IC Design

    By sjwprc

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    updated over 6 years ago by Andrew Beckett

    1 replies • 14245 views
  • Discussion

    instances based simulation tolerance setting

    Category: Custom IC Design

    By DavidLou

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    updated over 6 years ago by Andrew Beckett

    3 replies • 16051 views
  • Discussion

    Virtuoso plot cannot adjust scale

    Category: Custom IC Design

    By CSCNalu

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    •

    updated over 6 years ago by CSCNalu

    2 replies • 14606 views
  • Discussion

    Linear regulator operating point over input DC Sweep

    Category: Custom IC Design

    By Johanny Saenz

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    updated over 6 years ago by Johanny Saenz

    2 replies • 14104 views
  • Discussion

    Reliability analysis issue - ADE L tool

    Category: Custom IC Design

    By EngTu

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    •

    updated over 6 years ago by EngTu

    2 replies • 4989 views
  • Discussion

    Characterization of a transmission gate (Liberate)

    Category: Custom IC Design

    By Edouardfr

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    •

    updated over 6 years ago by Guangjun Cao

    1 replies • 16431 views
  • Discussion

    Cannot select a layer. Layer-Purpose pair does not exist in LSW?

    Category: Custom IC Design

    By vinamarora8

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    updated over 6 years ago by divpra01

    4 replies • 18755 views
  • Discussion

    How to run jitter tolerance analysis in cadence

    Category: Custom IC Design

    By usuikazou

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    •

    updated over 6 years ago by Andrew Beckett

    1 replies • 14705 views
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