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Custom IC Design

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  • Discussion

    Error during Monte Carlo stimulation

    Category: Custom IC Design

    By vvdb

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    •

    updated over 5 years ago by Andrew Beckett

    3 replies • 13543 views
  • Discussion

    A problem with ports mismatch in LVS

    Category: Custom IC Design

    By Hamid67

    $usertype

    •

    updated over 5 years ago by Hamid67

    7 replies • 28075 views
  • Discussion

    Cadence Virtuoso Technology Files and Libraries

    Category: Custom IC Design

    By Ozan23

    $usertype

    •

    updated over 5 years ago by Andrew Beckett

    1 replies • 21555 views
  • Discussion

    Error During Using calcVal for Calibration and Performing Temperature Sweep

    Category: Custom IC Design

    By baltacican87

    $usertype

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    updated over 5 years ago by Andrew Beckett

    5 replies • 24357 views
  • Discussion

    Defining viva background color changed from IC6.1.7 to 6.1.8?

    Category: Custom IC Design

    By CADcasualty

    $usertype

    •

    updated over 5 years ago by CADcasualty

    2 replies • 18943 views
  • Discussion

    How to handle XL compliance and LVS reduction together

    Category: Custom IC Design

    By Suryansh Singh

    $usertype

    •

    started over 5 years ago

    0 replies • 12774 views
  • Discussion

    export snp s parameter from multiple conditions in ADE explorer

    Category: Custom IC Design

    By Jay Yang

    $usertype

    •

    started over 5 years ago

    0 replies • 12245 views
  • Discussion

    Different results between PSS and Transient Simulation when using NPORT (EMX)

    Category: Custom IC Design

    By youckgab

    $usertype

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    updated over 5 years ago by Andrew Beckett

    1 replies • 15099 views
  • Discussion

    Annotation does not work however, Print DC operating point works fine - ISSUE

    Category: Custom IC Design

    By FormerMember

    $usertype

    •

    updated over 5 years ago by Avinash Murugesan

    6 replies • 7813 views
  • Discussion

    Re: Extracting device Vgb,Vsb,Vdb info from 'tranOp ??

    Category: Custom IC Design

    By npamd

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    updated over 5 years ago by Andrew Beckett

    8 replies • 4066 views
  • Discussion

    Difference in result with BSIM and PSP models

    Category: Custom IC Design

    By engrvip

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    •

    updated over 5 years ago by Andrew Beckett

    1 replies • 13632 views
  • Discussion

    Unable to change diode parameters when importing the CDL netlist

    Category: Custom IC Design

    By OrangeHalo

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    •

    updated over 5 years ago by Quek

    8 replies • 17965 views
  • Discussion

    In which file/cellview are the CDF parameters are stored ?

    Category: Custom IC Design

    By HoWei

    $usertype

    •

    updated over 5 years ago by HoWei

    2 replies • 3986 views
  • Discussion

    VIVA trace legend font ?

    Category: Custom IC Design

    By cADEUser

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    •

    updated over 5 years ago by Andrew Beckett

    5 replies • 15102 views
  • Discussion

    annotate the operating point of transistors

    Category: Custom IC Design

    By svilen

    $usertype

    •

    updated over 5 years ago by FormerMember

    1 replies • 14021 views
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