Custom IC Design

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Discussion

Issue using vpwl

Category: Custom IC Design

By spatz

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updated over 1 year ago by spatz

3 replies • 4978 views
Discussion

abstract generator - are there absSetBinOption function descriptions available ?

Category: Custom IC Design

By drosi

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started over 1 year ago

0 replies • 418 views
Discussion

Saving Internal Junction Temperature of VBIC Bipolar Transistor Model

Category: Custom IC Design

By sgcad

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updated over 1 year ago by sgcad

5 replies • 5467 views
Discussion

How can I take a real value and assign it to a node in this case the output port of my module

Category: Custom IC Design

By Wasif Absar

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updated over 1 year ago by Wasif Absar

2 replies • 4218 views
Discussion

ADC Verification Workshop link is showing as retired,can I get this content, please

Category: Custom IC Design

By RanjithD

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updated over 1 year ago by Andrew Beckett

1 replies • 1395 views
Discussion

AOP Netlisting failed because of errors in callback

Category: Custom IC Design

By Monarch03116

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updated over 1 year ago by Andrew Beckett

1 replies • 3891 views
Discussion

How to get an I-V curve like this?

Category: Custom IC Design

By Doronzzz

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updated over 1 year ago by Frank Wiedmann

5 replies • 4854 views
Discussion

Run multiple same type analysis in IC 23.1 ADE

Category: Custom IC Design

By SimbaG

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updated over 1 year ago by Andrew Beckett

5 replies • 5887 views
Discussion

Spectre X Transient Simulation Discrepancy vs. Spectre APS

Category: Custom IC Design

By jacob.sillman

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updated over 1 year ago by jacob.sillman

4 replies • 5580 views
Discussion

Source setlist references but does not define...

Category: Custom IC Design

By gsciller

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updated over 1 year ago by gsciller

2 replies • 4337 views
Discussion

Using _ansCdlSubcktCall to netlist but inherited sub pin not netlisting

Category: Custom IC Design

By rglenf

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updated over 1 year ago by rglenf

2 replies • 1064 views
Discussion

setting "max_approach_step" parameter

Category: Custom IC Design

By anwx

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updated over 1 year ago by anwx

3 replies • 4108 views
Discussion

Copied layout always refers to the old physConfig

Category: Custom IC Design

By RuihW

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updated over 1 year ago by Andrew Beckett

1 replies • 4395 views
Discussion

Reuse DC solution from a specific corner in one test in the same corner of a different test

Category: Custom IC Design

By Analog Pete

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updated over 1 year ago by Analog Pete

7 replies • 5843 views
Discussion

Analysis (stb): phase plots shows reversal i.e. phase plot starting from 0 degree

Category: Custom IC Design

By BitanMallik

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updated over 1 year ago by Frank Wiedmann

1 replies • 4440 views

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