Custom IC Design

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Discussion

How to use a CSV file in Cadence?

Category: Custom IC Design

By Sachin Mishra

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updated over 3 years ago by Sachin Mishra

6 replies • 20271 views
Discussion

Can I generate layout from source but not from the same hierarchy level?

Category: Custom IC Design

By delgsy

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updated over 3 years ago by delgsy

8 replies • 11397 views
Discussion

Passing LVS without making the well tap in the current hierarchy

Category: Custom IC Design

By delgsy

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started over 3 years ago

0 replies • 8430 views
Discussion

Inclusion of Spectre analysis statements via include file in ADE: How to control it?

Category: Custom IC Design

By StephanWeber

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updated over 3 years ago by Andrew Beckett

3 replies • 10284 views
Discussion

How can I use a paramset to define a dc simulation for certain parameter combinations?

Category: Custom IC Design

By StephanWeber

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updated over 3 years ago by Marc Heise

1 replies • 9010 views
Discussion

stability analysis RC coupled Vs RC decoupled

Category: Custom IC Design

By Pirate King

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updated over 3 years ago by Pirate King

3 replies • 9619 views
Discussion

probe a structure for all layout layers used in its build?

Category: Custom IC Design

By kenc184

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updated over 3 years ago by kenc184

5 replies • 9317 views
Discussion

Layout XL : Connectivity - Update Function

Category: Custom IC Design

By amssshubham

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updated over 3 years ago by Andrew Beckett

4 replies • 6533 views
Discussion

Cadence understand Poly resistor as a poly contact problem

Category: Custom IC Design

By Senan

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updated over 3 years ago by Senan

4 replies • 13209 views
Discussion

When I open the simulation state which I create before, I can not reload the state and show the information below. What should I do to fix it?

Category: Custom IC Design

By SnowPine

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updated over 3 years ago by Andrew Beckett

6 replies • 11972 views
Discussion

Create Label window disappears after selecting auto

Category: Custom IC Design

By delgsy

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updated over 3 years ago by delgsy

2 replies • 10080 views
Discussion

Label created in an unknown layer

Category: Custom IC Design

By delgsy

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updated over 3 years ago by Andrew Beckett

3 replies • 9679 views
Discussion

Running Spectre simulation and then plotting in ViVA by using system() command from MATLAB

Category: Custom IC Design

By RFStuff

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updated over 3 years ago by RFStuff

6 replies • 11290 views
Discussion

Changing names of multiple nets connected to a unique pin name

Category: Custom IC Design

By ud7842

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updated over 3 years ago by Andrew Beckett

3 replies • 11663 views
Discussion

Clear/close a 'running' ADE-XL

Category: Custom IC Design

By TempViator

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updated over 3 years ago by FormerMember

7 replies • 5009 views

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