Custom IC Design

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Discussion

What is thermal noise called

Category: Custom IC Design

By wgtkan

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updated over 5 years ago by wgtkan

2 replies • 15834 views
Discussion

Reading from a file in Verilog-A

Category: Custom IC Design

By Manev

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updated over 5 years ago by Andrew Beckett

4 replies • 17191 views
Discussion

monte carlo simulation

Category: Custom IC Design

By Nathan Chen

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updated over 5 years ago by Frank Wiedmann

2 replies • 14570 views
Discussion

Question on ADE Assembler (maestro) corner setup

Category: Custom IC Design

By yizhu1

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updated over 5 years ago by yizhu1

4 replies • 15965 views
Discussion

Save VHDL variables of specific hierachy

Category: Custom IC Design

By michael10

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updated over 5 years ago by michael10

2 replies • 13959 views
Discussion

Libraries not imported in the Library manager

Category: Custom IC Design

By UUinfini

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updated over 5 years ago by UUinfini

8 replies • 18117 views
Discussion

Does MC mismatch simulation reflect best or arbitrary layout ?

Category: Custom IC Design

By HoWei

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updated over 5 years ago by HoWei

4 replies • 16710 views
Discussion

Stability check issue during phase starting with 0 degree

Category: Custom IC Design

By MIN KIM

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updated over 5 years ago by Frank Wiedmann

3 replies • 18434 views
Discussion

Stability factor of differential LNA

Category: Custom IC Design

By Qusai

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updated over 5 years ago by FormerMember

7 replies • 18082 views
Discussion

Transient Violations taking too much disk space

Category: Custom IC Design

By ChrisG04

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updated over 5 years ago by ChrisG04

2 replies • 14824 views
Discussion

ADE Explorer switch view list

Category: Custom IC Design

By FormerMember

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updated over 5 years ago by Andrew Beckett

3 replies • 6034 views
Discussion

LVS error

Category: Custom IC Design

By sjeur

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updated over 5 years ago by Andrew Beckett

3 replies • 14056 views
Discussion

ADE L problem

Category: Custom IC Design

By Archon

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updated over 5 years ago by Andrew Beckett

3 replies • 14716 views
Discussion

annotating parasitics from Calibre PEX netlist to layout or schematic

Category: Custom IC Design

By haritha8085

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updated over 5 years ago by Andrew Beckett

1 replies • 14384 views
Discussion

cross probing between layout and schematic

Category: Custom IC Design

By haritha8085

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updated over 5 years ago by Andrew Beckett

1 replies • 14093 views

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