Custom IC Design

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Stimulus File Issues

Category: Custom IC Design

By Devin Atkin

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updated over 5 years ago by Andrew Beckett

1 replies • 15384 views
Discussion

Issue with Result Display Window

Category: Custom IC Design

By wgtkan

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started over 5 years ago

0 replies • 13588 views
Discussion

Bump location reassignment in LayoutXL

Category: Custom IC Design

By JXXX

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started over 5 years ago

0 replies • 12362 views
Discussion

Detecting existence of cds_global variable in AMS

Category: Custom IC Design

By NickA

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started over 5 years ago

0 replies • 12799 views
Discussion

cannot open file for edit in VSE

Category: Custom IC Design

By sidm

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started over 5 years ago

0 replies • 12801 views
Discussion

Bus pin mapping in layout

Category: Custom IC Design

By noramirkh

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started over 5 years ago

0 replies • 12320 views
Discussion

spectre fails to finish transient sims

Category: Custom IC Design

By cADEUser

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updated over 5 years ago by Andrew Beckett

1 replies • 16817 views
Discussion

Changing the value of a Variable in Maestro every time a simulation is run

Category: Custom IC Design

By netbug

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updated over 5 years ago by netbug

4 replies • 16123 views
Discussion

LSSP Simulation for Floated RF Port is Reliable?

Category: Custom IC Design

By Mehdi Nasr

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updated over 5 years ago by Andrew Beckett

3 replies • 14293 views
Discussion

OP point print issue

Category: Custom IC Design

By sjwprc

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started over 5 years ago

0 replies • 12285 views
Discussion

Preference to define bus bit format

Category: Custom IC Design

By noramirkh

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updated over 5 years ago by Andrew Beckett

5 replies • 16339 views
Discussion

Model files defined in .cdsenv for spectre are not loading

Category: Custom IC Design

By wgtkan

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updated over 5 years ago by wgtkan

5 replies • 17491 views
Discussion

Virtuso Editor setting

Category: Custom IC Design

By dressler6

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updated over 5 years ago by Andrew Beckett

1 replies • 12681 views
Discussion

Assura RCX fails

Category: Custom IC Design

By Omar Alngar

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updated over 5 years ago by Andrew Beckett

7 replies • 14481 views
Discussion

Verilog-A block works with transient analysis but has no output with harmonic balance

Category: Custom IC Design

By MatthewLove

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updated over 5 years ago by MatthewLove

9 replies • 20875 views

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