Custom IC Design

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ADE XL Error

Category: Custom IC Design

By wgtkan

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updated over 6 years ago by wgtkan

2 replies • 17879 views
Discussion

Error when try to use ADE simulator to initialize

Category: Custom IC Design

By Ning08

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updated over 6 years ago by Andrew Beckett

3 replies • 17546 views
Discussion

Layout problem when trying to see layers

Category: Custom IC Design

By abdoboua

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updated over 6 years ago by Andrew Beckett

1 replies • 14439 views
Discussion

How can i enable annotations in virtuoso?

Category: Custom IC Design

By Genas

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updated over 6 years ago by Andrew Beckett

3 replies • 15859 views
Discussion

Annotation not working even after selecting the cdsparams

Category: Custom IC Design

By Genas

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updated over 6 years ago by Andrew Beckett

1 replies • 15141 views
Discussion

Creating a symbol view from the source code pointed by SimVision

Category: Custom IC Design

By RFStuff

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updated over 6 years ago by Andrew Beckett

1 replies • 14323 views
Discussion

Dynamic glitch check - on bus + variable level definition

Category: Custom IC Design

By sgserg

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updated over 6 years ago by Andrew Beckett

1 replies • 1326 views
Discussion

How to check the DC operating condition of a MOS in extracted netlist simulation

Category: Custom IC Design

By RFStuff

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updated over 6 years ago by Andrew Beckett

1 replies • 14289 views
Discussion

Virtuoso flatten verilog netlist generation question

Category: Custom IC Design

By Joonsoo

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updated over 6 years ago by Andrew Beckett

3 replies • 16886 views
Discussion

tie jitter function

Category: Custom IC Design

By Karev11

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updated over 6 years ago by Andrew Beckett

1 replies • 15009 views
Discussion

Full chip transistor level simulation convergence problem

Category: Custom IC Design

By Zhao Hui

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updated over 6 years ago by Andrew Beckett

1 replies • 14387 views
Discussion

Cadence crashes every time I change a wave's color

Category: Custom IC Design

By Kyle W

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updated over 6 years ago by Andrew Beckett

5 replies • 2098 views
Discussion

display result from on-going simulation

Category: Custom IC Design

By Karev11

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updated over 6 years ago by Karev11

2 replies • 14476 views
Discussion

Voltus-Fi vpserro layers display

Category: Custom IC Design

By ArturS

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updated over 6 years ago by Andrew Beckett

1 replies • 5562 views
Discussion

deepprobe for pex (spf) view

Category: Custom IC Design

By skamlesh

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started over 6 years ago

0 replies • 14842 views

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