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Custom IC Design

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  • Discussion

    Saving Internal Junction Temperature of VBIC Bipolar Transistor Model

    Category: Custom IC Design

    By sgcad

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    updated over 1 year ago by sgcad

    5 replies • 5453 views
  • Discussion

    How can I take a real value and assign it to a node in this case the output port of my module

    Category: Custom IC Design

    By Wasif Absar

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    •

    updated over 1 year ago by Wasif Absar

    2 replies • 4204 views
  • Discussion

    ADC Verification Workshop link is showing as retired,can I get this content, please

    Category: Custom IC Design

    By RanjithD

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    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 1394 views
  • Discussion

    AOP Netlisting failed because of errors in callback

    Category: Custom IC Design

    By Monarch03116

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    updated over 1 year ago by Andrew Beckett

    1 replies • 3877 views
  • Discussion

    How to get an I-V curve like this?

    Category: Custom IC Design

    By Doronzzz

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    •

    updated over 1 year ago by Frank Wiedmann

    5 replies • 4834 views
  • Discussion

    Run multiple same type analysis in IC 23.1 ADE

    Category: Custom IC Design

    By SimbaG

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    updated over 1 year ago by Andrew Beckett

    5 replies • 5858 views
  • Discussion

    Spectre X Transient Simulation Discrepancy vs. Spectre APS

    Category: Custom IC Design

    By jacob.sillman

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    updated over 1 year ago by jacob.sillman

    4 replies • 5559 views
  • Discussion

    Source setlist references but does not define...

    Category: Custom IC Design

    By gsciller

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    updated over 1 year ago by gsciller

    2 replies • 4322 views
  • Discussion

    Using _ansCdlSubcktCall to netlist but inherited sub pin not netlisting

    Category: Custom IC Design

    By rglenf

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    •

    updated over 1 year ago by rglenf

    2 replies • 1062 views
  • Discussion

    setting "max_approach_step" parameter

    Category: Custom IC Design

    By anwx

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    •

    updated over 1 year ago by anwx

    3 replies • 4094 views
  • Discussion

    Copied layout always refers to the old physConfig

    Category: Custom IC Design

    By RuihW

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    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 4374 views
  • Discussion

    Reuse DC solution from a specific corner in one test in the same corner of a different test

    Category: Custom IC Design

    By Analog Pete

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    •

    updated over 1 year ago by Analog Pete

    7 replies • 5808 views
  • Discussion

    Analysis (stb): phase plots shows reversal i.e. phase plot starting from 0 degree

    Category: Custom IC Design

    By BitanMallik

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    •

    updated over 1 year ago by Frank Wiedmann

    1 replies • 4422 views
  • Discussion

    load skill file without starting Virtuoso but use Virtuoso API.

    Category: Custom IC Design

    By Maple Oven

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    •

    updated over 1 year ago by RobMan

    1 replies • 4212 views
  • Discussion

    Mismatch current Parameters for 65nm TSMC technology

    Category: Custom IC Design

    By Phd SA88

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    •

    updated over 1 year ago by DomiHammerfall

    1 replies • 5265 views
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