Custom IC Design

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Discussion

operating points implementation (verilogA and CDF)

Category: Custom IC Design

By Fabb

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updated over 12 years ago by Andrew Beckett

3 replies • 13530 views
Discussion

importing EDIF file (library install)

Category: Custom IC Design

By oldnick

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updated over 12 years ago by oldnick

2 replies • 16813 views
Discussion

verilogin problem: modules are imported twice

Category: Custom IC Design

By Howel

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updated over 12 years ago by Howel

2 replies • 14023 views
Discussion

Virtuoso Strmout of selected cells

Category: Custom IC Design

By Stevemc12

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updated over 12 years ago by Andrew Beckett

3 replies • 15191 views
Discussion

ADE XL job dispatch behavior (LSF)

Category: Custom IC Design

By kentauta

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updated over 12 years ago by Andrew Beckett

1 replies • 14930 views
Discussion

Force ams netlister to skip ports/pins

Category: Custom IC Design

By Runner

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updated over 12 years ago by Andrew Beckett

1 replies • 1012 views
Discussion

How to attach the cdl netlist with cdl view

Category: Custom IC Design

By scorashu

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updated over 12 years ago by Andrew Beckett

1 replies • 19224 views
Discussion

DRC and LVS error

Category: Custom IC Design

By samanehrh

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updated over 12 years ago by Andrew Beckett

1 replies • 13494 views
Discussion

Have problem in simulating circuit in virtuoso ADE

Category: Custom IC Design

By sunilreddy

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updated over 12 years ago by Andrew Beckett

3 replies • 13749 views
Discussion

Resistor transient noise issues with spectre

Category: Custom IC Design

By samini

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updated over 12 years ago by Andrew Beckett

1 replies • 14101 views
Discussion

spectre nested sweep in MC run fails to "export" expression

Category: Custom IC Design

By kxlux

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updated over 12 years ago by Andrew Beckett

11 replies • 6618 views
Discussion

ADE-XL/Spectre unobtrusive stb with iprobe

Category: Custom IC Design

By daasboe

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updated over 12 years ago by Andrew Beckett

1 replies • 2162 views
Discussion

Error (VACOM-1008) - Cannot compile ahdlcmi module library (MMSIM.07.11)

Category: Custom IC Design

By samini

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updated over 12 years ago by Andrew Beckett

7 replies • 4707 views
Discussion

Mapping a 'cv~>prop' array with any other array

Category: Custom IC Design

By shazzy

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updated over 12 years ago by Andrew Beckett

4 replies • 1511 views
Discussion

Parallel simulation with Cadence

Category: Custom IC Design

By Monady

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updated over 12 years ago by Andrew Beckett

8 replies • 16408 views

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