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Custom IC Design

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  • Discussion

    Finding view name used by current ADE Explorer session

    Category: Custom IC Design

    By raduionescu raduionescu

    •

    updated over 2 years ago by raduionescu

    2 replies • 7793 views
  • Discussion

    Is thre a simulator function that can control the simulator's temperature in Verilog AMS?

    Category: Custom IC Design

    By SpiceMonkey SpiceMonkey

    •

    updated over 2 years ago by SpiceMonkey

    2 replies • 1068 views
  • Discussion

    Why doesn't a non repeating sequence "simple" voltage source exist?

    Category: Custom IC Design

    By kenc184 kenc184

    •

    updated over 2 years ago by kenc184

    6 replies • 3309 views
  • Discussion

    How to show process corner information inside the plot?

    Category: Custom IC Design

    By delgsy delgsy

    •

    updated over 2 years ago by delgsy

    4 replies • 7757 views
  • Discussion

    Layout XL stop layers (again)

    Category: Custom IC Design

    By tdtg tdtg

    •

    updated over 2 years ago by tdtg

    2 replies • 8494 views
  • Discussion

    Availability of Sensitivity results in Assembler after corner run?

    Category: Custom IC Design

    By StephanWeber StephanWeber

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 7216 views
  • Discussion

    How to re-use a setting for Assembler Results Table (Detailed Transposed)?

    Category: Custom IC Design

    By StephanWeber StephanWeber

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 6847 views
  • Discussion

    unwrap family

    Category: Custom IC Design

    By Brad RFeng Brad RFeng

    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 7035 views
  • Discussion

    Virtuoso command not found

    Category: Custom IC Design

    By VoTuanMinh VoTuanMinh

    •

    updated over 2 years ago by Andrew Beckett

    21 replies • 24535 views
  • Discussion

    How to use corner output expression in other corners for a multiple corner sim?

    Category: Custom IC Design

    By vpeddireddy vpeddireddy

    •

    updated over 2 years ago by Andrew Beckett

    4 replies • 9872 views
  • Discussion

    Liberate: are only hidden power arcs needed when defining power arcs during STD cell characterisation?

    Category: Custom IC Design

    By jiacong jiacong

    •

    started over 2 years ago

    0 replies • 6911 views
  • Discussion

    Schematic bus terminals has no corresponding layout bus terminal definition

    Category: Custom IC Design

    By sidm sidm

    •

    updated over 2 years ago by sidm

    3 replies • 8104 views
  • Discussion

    Bus termination error?

    Category: Custom IC Design

    By kenc184 kenc184

    •

    updated over 2 years ago by Andrew Beckett

    8 replies • 10144 views
  • Discussion

    How can I quickly check the run date of a History item in Assembler from Data View assistant?

    Category: Custom IC Design

    By StephanWeber StephanWeber

    •

    updated over 2 years ago by Andrew Beckett

    4 replies • 7887 views
  • Discussion

    iv characteristics of solar cell in cadence virtuoso

    Category: Custom IC Design

    By isiaka099 isiaka099

    •

    started over 2 years ago

    0 replies • 6479 views
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