Automatic placement of VIAs

Just my opinion on how I would approach initially.

prerequisite - DRC & LVS clean.

 1) If it is a hierarchial design then open each cell.

2) Write a deck that can generate marker layers overlapping the AND of M1 and M2 with atleast one VIA12 inside.Preferably DIVA.

3) if such markers are available then iterate over those markers. Calculate its width & Length. Using this calculate the no.of vias it can fit.

4) If you  know the cellnames of VIA12s used,  then check the number of vias already under this marker. if less than no.of vias calculated in step3. Delte the current cell and place a new one or just change row & col properties.

catch22 :- As is obvious there are certain limitations. As is obvious this flow will consume lot of time. For flat designs start from step2 and some changes needed at step4.

Are you aware of the "Auto Contact" switch in Create->Contact (IC5141) or the "Auto" mode of Create->Via in IC61X? Does this avoid the need to write SKILL code?

For babji's suggestion, you really need to have a via present already (otherwise it would end up detecting all M2/M1 overlaps, and obviously many would probably be separate nets). If you're going to have to place a via anyway, why not just use the auto mode to place the right number of vias in the first place?

Regards,

Andrew.

Hi,

 I am not aware of auto contact, I am using IC5141.

The design doesn't have any hierarichy.

Thsnkd,

Vignesh T K

Hi,

The auto contact working only for the paths, My design has all shpaes.

Wat can be done in this situation?

Thanks,

Vignesh T K 

 This requirement may be either part of DFM or just out of curiosity question.

Usually new layout enginners or even few experienced engineers use polygons instead of paths. In such cases auto-contact doesn't work IMO. And when polygons are used engineers use few vias than can be accomodated. Usually this practice is profound among engineers new to layout. In technologies like >0.18um engrs use only 1 or 2 vias (!= power nets).

BTW, Auto mode in Create Via in IC613 works with overlapping rectangles as well as paths/pathSegs (pathSegs are a new object which are used in the create wire command - which incidentally allows creation of 45-degree segments where both the centre line and edge vertices are on the manufacturing grid).

Regards,

Andrew.

 deck can be written to identify only overlaps with vias. like one below

saveDerived( geomOverLap( VIA12 geomAnd( M1 M2) keep >= 1 )  "marker layer" )