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  3. [Cadence Virtuoso] matching schematic transistors with interdigitated...

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[Cadence Virtuoso] matching schematic transistors with interdigitated layout counterparts

calbear2009
calbear2009 over 15 years ago

Hi,

In Cadence Virtuoso/Composer, I am trying to match multiple transistors devices in my schematic to interdigitated transistors in layout.

However, Virtuoso seems to have a problem mapping many schematic devices to a single cell in layout. How do I do this? This would be crucial for LVS, and I believe the interdigitated fingers for matching transistors is a common practice. Thanks a lot in advance!

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  • Alex Soyer
    Alex Soyer over 15 years ago

     Hi calbear2009,

     which version of Virtuoso do you use ?

    In Layout XL you can use the 'Define Device Correspondance' feature in the 'Connectivity' menu (on layout side).

    You can map multiple schematic instances to one layout instance.

    Thanks,

    Alex

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  • calbear2009
    calbear2009 over 15 years ago

    Thanks for the reply.

    I am using Virtuoso Layout Editor 5.10.41...

    In this version, there is no 'Define Device Correspondence' in the 'Connectivity' menu,

    though there is a 'Device Correspondence' in the 'Create' menu.

    I can map one schematic instance to multiple layout instances here, but cadence won't allow

    me to do vice versa (dragging will not select multiple schematic instances). Any help would be great.Thanks!

     

     

     

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  • Alex Soyer
    Alex Soyer over 15 years ago

    Could you please explain how you could have multiple devices in schematic to be bound with only device on layout ?

    If you have interdigitated transistors in the layout I assumed you had multiples device or maybe you have created an extra level of hiearchy.

     In case you have added a level of hierarchy then you need to create this extra level of hierarchy in the schematic as well.

    Anyway I'll check but I think in 5.1.41 you could not map one layout device to multiple schematic devices.

    Thanks,

    Alex

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  • calbear2009
    calbear2009 over 15 years ago

    I had a bunch of transistor devices in schematic, but combined them as one transistor cell in layout (with multiple fingers).

    I realized this is probably the toughest way to go.

    Instead, I generated a transistor cell in layout for each transistor in schematic, and then overlapped the source or drains

    of each transistor layout cell with another to create the interdigitation I desired. This fixed the problem I had, and the cells were

    already mapped between schematic and layout.

    I guess this is why cadence will not let me map one layout device to multiple schematic devices, since no one would do something dumb like I did. Thank you very much for helping me along the way.

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