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Process antenna violation?

Hoang Nguyen

Hi, 

I already set options to fix process antenna violations:

- setNanoRouteMode drouteFixAntenna true
- setNanoRouteMode routeInsertAntennaDiode true
- setNanoRouteMode routeAntennaCellName FILLANT1 (process C35B4)

However, the Process Antenna violation tool still reported more than 60 violations. I also tried to set routeAntennaCellName to automatic mode but result was the same. In the routed design, I can find only one cell of kind FILLANT1. There is plenty of space around violations points to place diodes but Nanaroute did not do that.

I exported and run verification in Virtuoso but number of violations was still big (~40).

Do you know how to reduce number of process antenna violations in Nanoroute ?

Thank you very much!

Hoang

 

 

 

 

 

  •  Hi Hoang,

    The "automatic" mode will only find antenna cells to use if they are defined as CLASS CORE ANTENNACELL in the LEF. Do you have cells with that definition? Also, FILLANT1 sounds like a small filler, not really an antenna cell - what are the antenna parameters in the LEF of this cell? (DiffArea, GateArea, etc.?)

    - Kari 

  •  Hi Kari,

    There are some cells named FILLANT1,2,5,10,25 in the CORELIB.lef file (AMS C35B4 tech). They are all defined as CLASS  CORE ANTENNACELL. For example, definition of FILLANT1 is:

    MACRO FILLANT1
      CLASS  CORE ANTENNACELL ;
      FOREIGN FILLANT1 0.000 0.000 ;
      ORIGIN 0.000 0.000 ;
      SIZE 1.400 BY 13.000 ;
      SYMMETRY X Y  ;
      SITE standard ;
      PIN ANT1
        ANTENNADIFFAREA 1.0 ;
        DIRECTION INPUT ;
        PORT
          LAYER MET1 ;
            RECT 0.250 3.450 1.150 4.350 ;
        END
      END ANT1
      PIN gnd!
        ...
      END gnd!
      PIN vdd!
        ...
      END vdd!
    END FILLANT1 

    If I set "automatic"mode, no diode was added. But if I set cell name to FILLANT1, I can find only one cell of that kind was added to fixed the process antenna violation.

    Any suggestion?

     

    Thanks

    Hoang

     

     

  •  Hi Hoang,

    Did u check the below setting in nanaroutemode.

    setNanoRouteMode -drouteEndIteration default

    According to this can also influence your antenna fix by nanaroute.

    This setting should be in "default" mode,

    if any numbers for iteration (ex:"20") then nanoroute doesnt fix the antenna violation.

     

     

  •  Hi Sundaresan,

    I have tried both setting iteration to default and 0-0, 1-1, 2-19, 20-20, but results were the same. The problem is the Nanoroute reported no antenna violation but then when I run verifyProcessAntenna, it produced a lot of violations.

    Regards

    Hoang

     

  •  Hi Hoang,

    check the following things:

    1. check Antenna options in nanaorute Atribute form and choose proper option for antenna.

    2. on which metal layer you are getting antenna violation, if they are on highest metal layer then only tool will insert the antenna diode and  if you have more than one antenna cell then mention all in nanoroute option form (name of diode)

    3. if it not on the highest metal layer then you have to sole manually by metal hogging(changing metal layer to higher metal layer)

    4. You try with only one ieration with "0" to "default", then check the nanoroute antenna violations and with verify process antenna violations(i had same problem, first i tried same way how u have done then checked with only one iteration and my problem solved).

    5. if ur design is congested then add filler cells after routing completed (i am not sure how much help this).

    Regards,

    Kul 

  • Hi Kulprashant,

    1. I have tried to change many paramters in Nanoroute but results were the same.

    2,3. All violations are on the highest layers. I only do not know why there is plenty of space around violations but Nanoroute did not add diodes to fix the violations.

    4. I have tried but no difference. I think that iteration "0" to "default" is quivalent to "default" to "default", they all run from 0 to 20.

    5. I dont understand this, but anyway I will add filler cells at the final step. Then if I convert to GDS stream and import to layout tool, there are still many process antenna violation.

    Any way, thank you very much for your suggestions.

    Regards
    Hoang

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