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Process antenna violation?

Hoang Nguyen

Hi, 

I already set options to fix process antenna violations:

- setNanoRouteMode drouteFixAntenna true
- setNanoRouteMode routeInsertAntennaDiode true
- setNanoRouteMode routeAntennaCellName FILLANT1 (process C35B4)

However, the Process Antenna violation tool still reported more than 60 violations. I also tried to set routeAntennaCellName to automatic mode but result was the same. In the routed design, I can find only one cell of kind FILLANT1. There is plenty of space around violations points to place diodes but Nanaroute did not do that.

I exported and run verification in Virtuoso but number of violations was still big (~40).

Do you know how to reduce number of process antenna violations in Nanoroute ?

Thank you very much!

Hoang

 

 

 

 

 

Parents

  •  Hi Hoang,

    check the following things:

    1. check Antenna options in nanaorute Atribute form and choose proper option for antenna.

    2. on which metal layer you are getting antenna violation, if they are on highest metal layer then only tool will insert the antenna diode and  if you have more than one antenna cell then mention all in nanoroute option form (name of diode)

    3. if it not on the highest metal layer then you have to sole manually by metal hogging(changing metal layer to higher metal layer)

    4. You try with only one ieration with "0" to "default", then check the nanoroute antenna violations and with verify process antenna violations(i had same problem, first i tried same way how u have done then checked with only one iteration and my problem solved).

    5. if ur design is congested then add filler cells after routing completed (i am not sure how much help this).

    Regards,

    Kul 

Reply

  •  Hi Hoang,

    check the following things:

    1. check Antenna options in nanaorute Atribute form and choose proper option for antenna.

    2. on which metal layer you are getting antenna violation, if they are on highest metal layer then only tool will insert the antenna diode and  if you have more than one antenna cell then mention all in nanoroute option form (name of diode)

    3. if it not on the highest metal layer then you have to sole manually by metal hogging(changing metal layer to higher metal layer)

    4. You try with only one ieration with "0" to "default", then check the nanoroute antenna violations and with verify process antenna violations(i had same problem, first i tried same way how u have done then checked with only one iteration and my problem solved).

    5. if ur design is congested then add filler cells after routing completed (i am not sure how much help this).

    Regards,

    Kul 

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