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clock tree synthesis.

gops
How should i manage CTS efficiently. I need to know what all things should be taken care in the clock tree sppecification file for an optimized clock tree. I usually create the .ctsch file from the tool itself. I just used to give the clock buffer and clock inverter foot prints for the purpose. Will this much information create the clock tree in an efficient way? if not please give me some tips to improve my clock tree. thanks gops.
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  •  Hi Kari,

     Thank you very much for your prompt response. Yes, that fixed it! The reason I omitted the 'Buffer' line is because I specified 'OptAddBuffer NO' since I do not want the CTS to insert any buffers in my design. However, it does insert them. How can I avoid this? Also, when the tree is routed (due to the 'RouteClkNet YES'), other nets are also routed. So my other question is: When I do the Nanoroute (after CTS) in order to route nets properly (I need to apply some MATCH constraints) will this affect the quality of the clock tree?

      Thank you again,

     Alex

Reply

  •  Hi Kari,

     Thank you very much for your prompt response. Yes, that fixed it! The reason I omitted the 'Buffer' line is because I specified 'OptAddBuffer NO' since I do not want the CTS to insert any buffers in my design. However, it does insert them. How can I avoid this? Also, when the tree is routed (due to the 'RouteClkNet YES'), other nets are also routed. So my other question is: When I do the Nanoroute (after CTS) in order to route nets properly (I need to apply some MATCH constraints) will this affect the quality of the clock tree?

      Thank you again,

     Alex

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