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Verification tools

Is it not required to do ERC and antenna checks for digital implementation? In encounter we usually do metal filling. I think the purpose is to reduce antenna effect. can some body explain why we use metal filling. Is it a must for all technology nodes or is it required at 90nm and below?

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gops over 16 years ago

Thanks Kari.

So I think the DRC/LVS tool will check the ERC and Antenna as well.
I think seperate command file will be necessary for both the purpose is it?( i 'm using TSMC foundry).

Thanks N regards
gops.
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gops over 16 years ago

Thanks Kari.

So I think the DRC/LVS tool will check the ERC and Antenna as well.
I think seperate command file will be necessary for both the purpose is it?( i 'm using TSMC foundry).

Thanks N regards
gops.
Cancel
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