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power routing for pads

gops
I intend to use0.18um TSMC library .When i choose the IO library i came to see that each IO cell need two VDD supply voltages one VDD(1.8V) and another VDDPST(3.3V). Also i found the VDDPAD and VSSPAD are provided for both core and IOs. I dont understand why we need VDD pad for IOs. Can anybody please tell me the reason in detail. Also please tell me reagrding power routing for IO cells.
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  • Kari

     Hi Gops,

    I don't think I've ever seen a design where core and IO power were the same voltage. However, I don't think it would matter. You would still have a core pwr/gnd ring that you add, and the IO pwr/gnd ring is connected by abutment of the IO cells. If there are gaps between IO cells, you put in IO fillers so that the rails are continuous. The corner cell is the same idea - it continues the rails around the corner.

    You would need "power cut" cells, or break cells, anywhere in the IO ring that you did not want the IO pwr/gnd to be continuous. For example, maybe most of your chip is digital but you have a small analog section, which includes analog IOs. They may be at a different voltage, or the same voltage but from a different vendor and so the pwr/gnd busses don't line up with your digital IOs. You would want to put break cells/endcap cells here to properly terminate the IO pwr/gnd rails. There can be break cells that just "cut" the busses in the middle, but could continue on either side, and there can also be endcap cells that just terminate the rails. It really depends on your design requirements where and when these are needed, as well as what is available in the IO library.

    - Kari 

Reply
  • Kari

     Hi Gops,

    I don't think I've ever seen a design where core and IO power were the same voltage. However, I don't think it would matter. You would still have a core pwr/gnd ring that you add, and the IO pwr/gnd ring is connected by abutment of the IO cells. If there are gaps between IO cells, you put in IO fillers so that the rails are continuous. The corner cell is the same idea - it continues the rails around the corner.

    You would need "power cut" cells, or break cells, anywhere in the IO ring that you did not want the IO pwr/gnd to be continuous. For example, maybe most of your chip is digital but you have a small analog section, which includes analog IOs. They may be at a different voltage, or the same voltage but from a different vendor and so the pwr/gnd busses don't line up with your digital IOs. You would want to put break cells/endcap cells here to properly terminate the IO pwr/gnd rails. There can be break cells that just "cut" the busses in the middle, but could continue on either side, and there can also be endcap cells that just terminate the rails. It really depends on your design requirements where and when these are needed, as well as what is available in the IO library.

    - Kari 

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