• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Digital Implementation
  3. Segmentation fault in SoC Encounter 4.1 with Nanoroute

Stats

  • Locked Locked
  • Replies 6
  • Subscribers 90
  • Views 15109
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Segmentation fault in SoC Encounter 4.1 with Nanoroute

archive
archive over 19 years ago

Hi,
I want to route my design in SoC Encounter and I use the follow script for Nanoroute:

setNanoRouteMode -quiet routeFixPrewire true
setNanoRouteMode -quiet route_selected_net_only false
setNanoRouteMode -quiet routeWithTimingDriven false
setNanoRouteMode -quiet routeTdrEffort 1
setNanoRouteMode -quiet drouteFixAntenna true
setNanoRouteMode -quiet routeWithSiDriven true
setNanoRouteMode -quiet routeSiLengthLimit 200
setNanoRouteMode -quiet routeSiEffort normal

globalDetailRoute

This work without problem.
But as I want to avoid routing on the first layer, I also add the follow option:

setNanoRouteMode -quiet routeBottomRoutingLayer 2

But with this option the program report an segmentation fault.

What's I'm doing wrong?

Christian


Originally posted in cdnusers.org by lets
  • Cancel
Parents
  • archive
    archive over 19 years ago

    Hi Christian,

    As Mohanch mentioned, it is impossible to route layer 1-7 if you have pin on metal1 (note: layer1 is metal1 and layer 7 is metal7).

    Most std cell pins are on metal1.

    Regards,
    Eng Han


    Originally posted in cdnusers.org by EngHan
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Reply
  • archive
    archive over 19 years ago

    Hi Christian,

    As Mohanch mentioned, it is impossible to route layer 1-7 if you have pin on metal1 (note: layer1 is metal1 and layer 7 is metal7).

    Most std cell pins are on metal1.

    Regards,
    Eng Han


    Originally posted in cdnusers.org by EngHan
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information