Stats

  • Locked Locked
  • Replies 11
  • Subscribers 91
  • Views 7138
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Encounter "short" violations

superman321
[Repost from IC design forum] hi, I have some "short" errors on my VDD and GND rails when I check for "verify geometry" using encounter for PAR. The macro cells's GND and VDD are placed 'right' on the designated GND and VDD rails and still the tool somehow doesnt match it with the cells GND/VDD and it shows short violations on every damn cell for GND and VDD!..any sort of help will be greatly appreciated. Here is the exact error message from encounter: "special wire of NET GND & blockage of cell g170" thanks
Parents
  • Kari

     I'm not sure if you have access to an abstract generator tool. That might make your job easier. For most std cells, you'll have M1 pins and some M1 blockages that are smaller shapes. But, I know nothing about your library - so the typical things may not apply. I would suggest trimming back the M1 blockage so that there is enough space between the blockage and the pwr/gnd pins, but you'll need to make sure that you're still covering everything you want to with the blockage. You could also try having the M1 cover even the pwr/gnd pins, and then run verify geometry with "allow pin in blockage", but I'm worried you may miss some real errors by doing that. 

Reply
  • Kari

     I'm not sure if you have access to an abstract generator tool. That might make your job easier. For most std cells, you'll have M1 pins and some M1 blockages that are smaller shapes. But, I know nothing about your library - so the typical things may not apply. I would suggest trimming back the M1 blockage so that there is enough space between the blockage and the pwr/gnd pins, but you'll need to make sure that you're still covering everything you want to with the blockage. You could also try having the M1 cover even the pwr/gnd pins, and then run verify geometry with "allow pin in blockage", but I'm worried you may miss some real errors by doing that. 

Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.