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bottomup flow,how to make submodule ring and stripe can been see in top module

verysmart

in a bottomup design flow , there is a submodule,it has its own power ring and stripe,

when load the submodule to top level,   how to make toplevel  know the  submodule's ring and stripe, so when do Sroute,  top level row and stripe will hook up the subblock ring and stripe correctly.

  the submodule designed by FLAT  Encounter flow with a speical digital library,  it has IO row, POWR ring/stripe and core row.

right now I use lef2oa and oa2lef, I can see VDD and VSS pin,but I cannot see the RING and Stripe definition. 

can somebody show me how to do this

 

  

  

 

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  • Hi

    After performing place and route for a block level design, extract a lef for that design using lefOut - command  .

    Ex:  lefOut -stripePin -PGpinLayers block_top_routing_layer  -specifyTopLayer  block_top_routing_layer  -5.6  outputfilename.lef

     

    Use this lef in top level flow along with technolgy lef & physical lef . Then you will get power grid information and it is vissible when you turn on instance pin. The tool will acees the same info while doing top level information.

     

    Regards,

    KVB 

Reply

  • Hi

    After performing place and route for a block level design, extract a lef for that design using lefOut - command  .

    Ex:  lefOut -stripePin -PGpinLayers block_top_routing_layer  -specifyTopLayer  block_top_routing_layer  -5.6  outputfilename.lef

     

    Use this lef in top level flow along with technolgy lef & physical lef . Then you will get power grid information and it is vissible when you turn on instance pin. The tool will acees the same info while doing top level information.

     

    Regards,

    KVB 

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