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Reg static and dynamic Power Analysis

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Hi...

I would like to knwo the steps included in finding out Static and dynamic Power analysis in SoC Encounter 8.1

I have a design.v, design_synth.v, .lib file, .lef file, .sdf file .So please let me know how to get the power .. include the steps plz...

how can i view(from GUI) my IO pads on the chip... i also included .io file when i import my design.
 
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  •  This is all covered in the User Guide (note that the Encounter User Guide refers you to the EPS User Guide chapters 5 - 12 for Signoff Analysis, but you can run all EPS functions through Encounter). I would only be repeating the steps from the guide. Please follow the Encounter or EPS User Guide, and post back to the forum if you come across a specific issue.

    Thanks!

     

Reply

  •  This is all covered in the User Guide (note that the Encounter User Guide refers you to the EPS User Guide chapters 5 - 12 for Signoff Analysis, but you can run all EPS functions through Encounter). I would only be repeating the steps from the guide. Please follow the Encounter or EPS User Guide, and post back to the forum if you come across a specific issue.

    Thanks!

     

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