Installing TSMC libraries in Cadence IC 6.1.3

Hi Nik,

 Whenever you ask questions about TSMC libraries it is best to include the full library name, because the different directory structures are used based on feature size.

 It sounds like you downloaded the digital synthesis and  timing libraries. If you are looking for layout then you have to download the backend package that has the gds layouts. What are you planning to use the library for?

There should be an application note in the tarball that has a table of which package has which data.

You will want: SEF, VLG and GDS.  The first has the LEF views and tech files for Virtuoso. The second has the Verilog models. The GDS tarball may not be available to you, it usually requires a contract with tsmc .You should be able to import them into Virtuoso.

Regards,

 Tom Belpasso

 Intergraded Vision

 Tom,

 Thanks for the reply

  All I wanna do is to process the extracted files (fron and back end packages) in order to create the following views:

schematic,symbol and layout of standard cells 

Could  you please advice me which sort of libs I need in order to generate the above mentioned views and also if I can do this using the import tools in the CIW window

Many Thannks

Nik

 Hi Nik,

 TSMC may have a composer toolkit for the library, it usually has to be requested directly from them. It is a "com" tar ball, short for composer.  It comes with symbol, Verilog and maybe schematic views. I seen problems where there were inconstancy between schematic and  Verilog views so do cross view checks.

If you have to, You can try to read the Verilog files to generate schematic and symbol views, but they may not look the way you want. It may be possible to import the spice of the cells to create schematics.

 As for the layout views, you should be able to create a library using the technology file in the backend /lef/*/techfiles then import the gds. If you need a layer map file, there should be a script to generate one depending on the number of layers.

If you need abstract abstract views, import the lef files to create them. Allow the technology to be updated when you import the lef.

Good luck, I hope TSMC has the Composer package for your library.

 Regards,

 Tom Belpasso

 Integrated-Vision.com

 Hi Tom,

I did manage to create abstract,functional (verilog) and symbol views for my standard cell library by using the import function in the CIW window

 When trying to generate a netlist (using spectre) of cells contaning the functional views I am getting the following error message :

 Netlist Error: Cannot find any info on instance "I3" in cell-view "tcbn65lp_140" "DFD4" "functional"
Netlist Error: Some cell-views used inside this block could not be netlisted in analog context

I have also added the 'functional' view into the ADE evironment options

Could you please advice me on the above issue

Many Thanks

Best Regards

Nik

Hi Nik,

Try reading the Spice (.spi) netlists into Spector, rather then the Verilog.   I have never done this so can't really give more specific instructions.  Be sure to the spice netlists that only have the active component and not the ones with layout parameter extraction(.lpe).

Good luck,

Tom Belpasso

Integrated Vision