How ClkGroups are identified from sdc during cts spec file creation?

Hi Rajesh,

I did some research into this issue.  Here's what I found:

• createClockTreeSpec (the TCL command that drives automatic clock tree spec file generation) doesn't have a productized ability to derive ClkGroups as of 9.1.USR2.
• It write blank statements as a place-holder for users to fill in on their own:
  #-- Clock Group --
  #ClkGroup
  #+ <clockName>
• Conceptually, a way this capability could sensibly work is that any 2 AutoCTSRootPins that drive registers that "talk" to one another should be grouped together because they could potentially cause a timing violating if their clock latencies weren't balanced with respect to one another.
• A command that might be helpful in determining which clock networks talk to one another:
  check_timing -check_only clock_crossing -verbose
  It outputs data like this:
       +------------------+
       |   TIMING CHECK   |
       |  CROSSING CLOCKS |
       |------------------|
       |  From | Crossing |
       | Clock |  Clocks  |
       |-------+----------|
       |  clka | clkb     |
       +------------------+
• I would imagine this computation could take quite some time on large designs, so perhaps that's why automatic clock group creation isn't productized- at least not yet.

try this

a)
create_clock -name CLK1 -period 5.0 [get_ports clk1  clk2]

b)
create_clock -name CLK1 -period 5.0 [get_ports clk1  ]
create_clock -name CLK2 -period 5.0 [get_ports clk2 ]

in sdc file if u give a list of clk root pins for creating clock like in (a),
these will be automatically grouped when u generate clock spec file .....

the later (2) u have to group using

ClkGroup
+clk1
+clk2


try to see DTMF's SDC file u'll find clock list

Hi Bob,

Thanks for the information.

The intent of this discussion is to understand how the "createClockTreeSpec -clkGroup" works and if it can be controlled using any of the sdc constructs, so that we can capture the design intent correctly.

Currently we use "createClockTreeSpec -clkGroup" option to automatically detect the "ClkGroups" and it does return the list of "ClkGroups". However, i'm not sure how it works.

If we specify a "false_path" between "CLKA and CLKB", it still groups them in ClkGroup since the automatic cts spec file creation does not honor "set_false_path" constructs.

We tried using "set_clock_groups -asynchronous" sdc construct, to disable grouping of some clocks, however even this is not honored by auto cts spec file creator. A CCR for the same has been filed (CCR 796164).

I believe that the cts spec file contents should reflect the timing intent captured by sdc, as closely as possible. If the design intent is not to analyze the timing paths between 2 clocks, then there is no need to "group" them as well.

This is more so in the case where we want to build the "generated" clocks separately.

Please do let me know if you get some information regarding the same.

Regards

Rajesh

Hi Rajesh,

createClockTreeSpec -clkGroup isn't productized functionality so it would probably be best if you work the issue through the channel through which you opened the ticket.  The feedback you provide here is appreciated, but we're duplicating a conversation that's winding up in the same place- with our product engineers and developers who architect this functionality.

Thanks for your time and interest in participating in these forums- I appreciate it and look forward to continuing the conversation on other subjects.

Best,
Bob