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How ClkGroups are identified from sdc during cts spec file creation?

Rajesh Vembu

Automatic clock tree specification file generation using encounter could result in some ClkGroup definitions.

It would be great if someone can throw some light on how ClkGroups are identified by tool. Are there any specific sdc constructs that influences the grouping??

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  • hey rajesh

    try this

    a)
    create_clock -name CLK1 -period 5.0 [get_ports clk1  clk2]

    b)
    create_clock -name CLK1 -period 5.0 [get_ports clk1  ]
    create_clock -name CLK2 -period 5.0 [get_ports clk2 ]

    in sdc file if u give a list of clk root pins for creating clock like in (a),
    these will be automatically grouped when u generate clock spec file .....

    the later (2) u have to group using

    ClkGroup
    +clk1
    +clk2


    try to see DTMF's SDC file u'll find clock list

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  • hey rajesh

    try this

    a)
    create_clock -name CLK1 -period 5.0 [get_ports clk1  clk2]

    b)
    create_clock -name CLK1 -period 5.0 [get_ports clk1  ]
    create_clock -name CLK2 -period 5.0 [get_ports clk2 ]

    in sdc file if u give a list of clk root pins for creating clock like in (a),
    these will be automatically grouped when u generate clock spec file .....

    the later (2) u have to group using

    ClkGroup
    +clk1
    +clk2


    try to see DTMF's SDC file u'll find clock list

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