Finding pins on side of the given cell

Interesting question -- could you tell us a little more about what you'd like to do here?

I've heard of folks wanting to create placement obstructions in the vicinity of the "pin side" of hard macros to help alleviate routing congestion and improve pin access.  The tricky thing is, with hard macros there really isn't a notion of a simple db marking that says which "side" pins are on because they're often made up of multiple geometries and aren't truly on an edge of the macro.  That said, with a little soft matching you can pretty easily infer which side(s) the pins are on.

You can use dbGet to query the pin locations:
set inst [dbGetInstByName <instName>]
dbGet $inst.instTerms.pt

Let us know a little more what you're looking for and we can share some more specifics.

Thanks,
Bob

Hi,

Thanks for the info Bob.

I was trying to write a TCL script to calculate the channel width between two cells. For this I wanted to know the pins at each side of the cell.And later find out the side which is common to both the cells and get the channel width.

If you have any other idea as to calculate the channel width between two cells.Please do let me know.

Thanks

There's a TCL command called "estimatePtnChannel" that might be useful in this scenario. Would you have a chance to look at that and let us know how well it suits your needs?

I seem to recall doing analysis of a design similar to what you're talking about. There was a bank of a dozen or so of the same hard macro instantiated in the design side-by-side. I kept running into routability problems and decided after a few iterations that it would be more efficient to estimate the required channel width by counting up the number of pins on the hard macro, and then estimating how many signals per micron I could fit in given the available tracks and power grid, and then determining how many microns the macros needed to be spaced out given this input.

Does that sound similar to what you're seeking to accomplish?

Exactly.....I wanted the same thing what u mentioned..... As far as what I know the width is calculated by taking into consideration the number of pins the two macros are facing each other multiplied by the width of the highest metal.....this gives the spacing to be given....Is it so.?? or is it something else other than this....If so please help me out how do we calculate the space keeping pins into consideration....

Thanks and Regards

Suhas

The way I'd go about it is calculating how many signals you can fit in a micron.  Estimate it for 10 or 100 microns for example.  Look at the pitch to determine how many signals can fit without the power grid, then subtract what the power grid consums.  Add up layers and it tells you how many signals you can fit per micron.  An aside here is that you'll find yourself considering whether your power grid is efficiently alligned with respect to your signal tracks -- often the power grid isn't designed so considerately.

Then, sum the pins on both sides of hard macro facing each other since all of the signals will need to escape on one side or the other.  Then multiply the number of signals by the signals per micron number you calculated to determine the channel width.

Let us know what you think and how it goes.  It sounds like there may be some room for tool enhancement in this area beyond what estimatePtnChannel does if it is indeed not delivering efficient clarity into the situation.

Hope this helps,
Bob

Okie.... I did execute the estimatePtnchannel command it gives me two blocks and the actual column and the required column. I have afew questions regarding this.

1. Does the actual column give me the actual spacing which I have given?? and does requires mean the requires spacing between those two blocks? if So that is what I need.... I want to know what is the minimum spacing required between two blocks which does not create routing problems later. If it is giving me that why do I need to calculate the pitch of the metal etc....

2. Does this spacing exculd the power straps if any in between the two blocks?

Thanks

Actual should report the current space between the 2 blocks, required should be what it's recommending.  Do the numbers seem reasonable to you?

More information here in this http://support.cadence.com solution:

Ya Bob.... it is actually giving the current spacing.... but my question is that its also giving required spacing.... does that mean the minimum required spacing between the two macros?? if so does it also include the routing spacing in that???

Thanks

Yes required spacing is a suggested amount that should prevent routabilit problems.

I'm not sure what you mean by "does it also include the routing spacing in that".  The estimate does a quick global route of the design which is aware of power routing and the pitch and number of routes through each channel.